Network Delay Estimation in Reverse Genlock Synchronized Display Walls

A tiled display wall is a combined screen composed of multiple individual displays. Without compromising display resolution, a scalable solution for building tiled display walls is proposed. Herein, each display node is solely equipped with an Internet protocol (IP) connection. As display nodes are independently free running, synchronization is required at the display refresh level and regarding the content. In this paper, we focus on the aspect of network forwarding delay estimation, which ultimately determines the accuracy of display phase synchronization of a tiled display wall following the Reverse Genlock paradigm as proposed by the authors earlier. We show that in both switched and shared medium networks, forwarding delay may be estimated with microsecond accuracy

PCIe Device Lending

We have developed a proof of concept for allowing a PCI Express device attached to one computer to be used by another computer without any software intermediate on the data path. The device driver runs on a physically separate machine from the device, but our implementation allows the device driver and device to communicate as if the device and driver were in the same machine, without modifying either the driver or the device. The kernel and higher level software can utilize the device as if it were a local device. A device will not be used by two separate machines at the same time, but a machine can transfer the control of a local device to a remote machine. We have named this concept "device lending". We envision that machines will have, in addition to local PCIe devices, access to a pool of remote PCIe devices. When a machine needs more device resources, additional devices can be dynamically borrowed from other machines with devices to spare. These devices can be located in a dedicated external cabinet, or be devices inserted into internal slots in a normal computer. The device lending is implemented using a Non-Transparent Bridge (NTB), a native PCIe interconnect that should offer performance close to that of a locally connected device. Devices that are not currently being lent to another host will not be affected in any way. NTBs are available as add-ons for any PCIe based computer and are included in newer Intel Xeon CPUs. The proof of concept we created was implemented for Linux, on top of the APIs provided by our NTB vendor, Dolphin. The host borrowing a device has a kernel module to provide the necessary software support and the other host has a user space daemon. No additional software modifications or hardware is required, nor special support from the devices. The current implementation works with some devices, but has some problems with others. We believe however, that we have identified the problems and how to improve the situation. In a later implementation, we believe that all devices we have tested can be made to work correctly and with very high performance

SPATIO-TEMPORAL REGISTRATION IN AUGMENTED REALITY

The overarching goal of Augmented Reality (AR) is to provide users with the illusion that virtual and real objects coexist indistinguishably in the same space. An effective persistent illusion requires accurate registration between the real and the virtual objects, registration that is spatially and temporally coherent. However, visible misregistration can be caused by many inherent error sources, such as errors in calibration, tracking, and modeling, and system delay. This dissertation focuses on new methods that could be considered part of "the last mile" of spatio-temporal registration in AR: closed-loop spatial registration and low-latency temporal registration: 1. For spatial registration, the primary insight is that calibration, tracking and modeling are means to an end---the ultimate goal is registration. In this spirit I present a novel pixel-wise closed-loop registration approach that can automatically minimize registration errors using a reference model comprised of the real scene model and the desired virtual augmentations. Registration errors are minimized in both global world space via camera pose refinement, and local screen space via pixel-wise adjustments. This approach is presented in the context of Video See-Through AR (VST-AR) and projector-based Spatial AR (SAR), where registration results are measurable using a commodity color camera. 2. For temporal registration, the primary insight is that the real-virtual relationships are evolving throughout the tracking, rendering, scanout, and display steps, and registration can be improved by leveraging fine-grained processing and display mechanisms. In this spirit I introduce a general end-to-end system pipeline with low latency, and propose an algorithm for minimizing latency in displays (DLP DMD projectors in particular). This approach is presented in the context of Optical See-Through AR (OST-AR), where system delay is the most detrimental source of error. I also discuss future steps that may further improve spatio-temporal registration. Particularly, I discuss possibilities for using custom virtual or physical-virtual fiducials for closed-loop registration in SAR. The custom fiducials can be designed to elicit desirable optical signals that directly indicate any error in the relative pose between the physical and projected virtual objects.Doctor of Philosoph

MaldOS: a Moderately Abstracted Layer for Developing Operating Systems

Anche se pochi studenti affronteranno la sfida di sviluppare software al di sotto del sistema operativo, la comprensione dei suoi principi di funzionamento è essenziale. In sè, la teoria dietro ai sistemi operativi non è particolarmente complessa: concetti come scheduling, livelli di esecuzione e semafori sono intuitivamente comprensibili; tuttavia appropriarsi pienamente di queste nozioni soltanto tramite lo studio teorico è quasi impossibile: serve un esempio pratico per assimilare i dettagli. Sviluppare un sistema operativo come progetto accademico è però diversi ordini di grandezza più difficile che creare un software in ambiente di lavoro già esistente. La complessità aggiunta dell'hardware va spesso oltre a quello che ci si aspetta dagli studenti, il che rende difficile anche soltanto la ricerca di un'architettura su cui lavorare. Questo studio è fortemente ispirato da precedenti soluzioni a questo problema come uMPS, un emulatore per il processore MIPS. Lavorando su una virtualizzazione semplificata gli studenti si possono concentrare sui concetti chiave dello sviluppo di un SO. Anche se ispirato a un'architettura reale, uMPS rimane comunque un ambiente astratto, e nel corso del lavoro potrebbe sorgere una sensazione di distacco dalla realtà. In questo studio si sostiene che un progetto simile possa essere sviluppato su hardware reale senza che questo diventi troppo complicato. L'architettura scelta è ARMv8, più moderna e diffusa rispetto a MIPS, nella forma della board educativa Raspberry Pi. Il risultato del lavoro è duplice: da una parte è stato portato avanti uno studio dettagliato su come sviluppare un sistema operativo minimale sul Raspberry Pi, dall'altra è stato creato un layer di astrazione che si occupa di semplificare l'approccio alle periferiche, permettendo agli utenti di costruirci sopra un piccolo sistema operativo. Pur facendo riferimento a un dispositivo reale, la possibilità di lavorare su un emulatore rimane grazie al supporto di Qemu

Enhancing a Neurosurgical Imaging System with a PC-based Video Processing Solution

This work presents a PC-based prototype video processing application developed to be used with a specific neurosurgical imaging device, the OPMI® PenteroTM operating microscope, in the Department of Neurosurgery of Helsinki University Central Hospital at Töölö, Helsinki. The motivation for implementing the software was the lack of some clinically important features in the imaging system provided by the microscope. The imaging system is used as an online diagnostic aid during surgery. The microscope has two internal video cameras; one for regular white light imaging and one for near-infrared fluorescence imaging, used for indocyanine green videoangiography. The footage of the microscope’s current imaging mode is accessed via the composite auxiliary output of the device. The microscope also has an external high resolution white light video camera, accessed via a composite output of a separate video hub. The PC was chosen as the video processing platform for its unparalleled combination of prototyping and high-throughput video processing capabilities. A thorough analysis of the platform and efficient video processing methods was conducted in the thesis and the results were used in the design of the imaging station. The features found feasible during the project were incorporated into a video processing application running on a GNU/Linux distribution Ubuntu. The clinical usefulness of the implemented features was ensured beforehand by consulting the neurosurgeons using the original system. The most significant shortcomings of the original imaging system were mended in this work. The key features of the developed application include: live streaming, simultaneous streaming and recording, and playing back of upto two video streams. The playback mode provides full media player controls, with a frame-by-frame precision rewinding, in an intuitive and responsive interface. A single view and a side-by-side comparison mode are provided for the streams. The former gives more detail, while the latter can be used, for example, for before-after and anatomic-angiographic comparisons.fi=Opinnäytetyö kokotekstinä PDF-muodossa.|en=Thesis fulltext in PDF format.|sv=Lärdomsprov tillgängligt som fulltext i PDF-format

Reconfigurable hardware for the new generation IoT video-cards

Dissertação de mestrado em Engenharia Eletrónica Industrial e ComputadoresEmbedded systems became a crucial research and developing area because of the dependence of society on devices and the growing demand for new technology products in our lives. The video industry is an example of remarkable technological advances by exploiting the hardware performance for bringing new video products along with even better video quality and higher resolution. Today is time for Ultra High Definition (UHD) resolution and the next new feature is the 8k. A relevant area that may benefit from 8k is medicine, by improving the detail and image quality in diagnoses. Moreover, Japan is preparing to become the first 8k transmitter at the 2020 Olympics. In spite of existing already general-purpose solutions for managing efficiently UHD video, the deployment of a customized configurable solution can be useful for a specific system needs. Besides, it may dictate market favorable positioning on meeting new market demands by providing faster upgrades. For addressing this problem, this MSc thesis proposes a hardware-based deployment of two essential reconfigurable cores for a new generation IoT UHD Video-Card, for managing huge memory accesses as well as for compressing video. The memory management provides a memory direct access for dealing with variable video resolution up to 8k, as well as data error control, frame alignment, configurable memory region, and more. The video compression is performed by a configurable core based on an open-source H.264 encoder. The results presented show it was achieved 8k real-time video streaming along with extra control and status functionalities. Video encoding was achieved for up to 8k.Os sistemas embebidos tornaram-se uma área fulcral de pesquisa e desenvolvimento devido à dependência da sociedade em dispositivos e à crescente procura por novidades tecnológicas para o quotidiano. A indústria de vídeo é um exemplo do notável avanço tecnológico ao explorar o desempenho máximo do hardware para trazer maior qualidade de vídeo e maior resolução. A resolução de vídeo UHD já é uma realidade e a próxima novidade é o 8k. Uma área de relevo que pode beneficiar do 8k é a medicina, com maior detalhe e qualidade de imagem em diagnósticos. Além disso, o Japão está preparar-se para se tornar o primeiro transmissor de 8k nas Olimpíadas de 2020. Apesar de existirem soluções capazes de gerir com eficiência vídeo UHD, uma solução personalizada e configurável pode ser útil para as necessidades específicas de um sistema. Além disso, pode ditar um posicionamento dianteiro no mercado ao atender às novas exigências do mercado fornecendo novidades mais rapidamente. Como possível solução para os problemas expostos, esta tese propõe o desenvolvimento de dois núcleos de hardware reconfigurável essenciais para uma nova geração de placas IoT de vídeo UHD, para gerir acessos à memória assim como para compactar vídeo. A gestão de memória desenvolvida fornece acesso direto à memória para lidar com resolução de vídeo variável e até 8k, além de controlo de erros de dados, alinhamento de frames, região de memória configurável e muito mais. A compactação de vídeo é realizada por um núcleo de hardware configurável, baseado num Encoder H.264 de código aberto. Os resultados mostram que foi alcançada transmissão de vídeo 8k em tempo real, além de funcionalidades extras de controlo e estado. A codificação de vídeo até 8k foi alcançada

Virtual reality application for rehabilitation

Aquest projecte té com a objectiu desenvolupar una aplicació de Realitat Virtual funcional per a la rehabilitació i el benestar de la gent gran en residències d’avis. El que es pretén és complementar el tractament de rehabilitació dels pacients mitjançant jocs de Realitat Virtual que els permetin realitzar moviments repetitius mentre es mouen per un entorn natural immersiu.Este proyecto tiene como objetivo desarrollar una aplicación de Realidad Virtual funcional para la rehabilitación y el bienestar de las personas mayores en residencias de ancianos. Lo que se pretende es complementar el tratamiento de rehabilitación de los pacientes mediante juegos de Realidad Virtual que les permitan realizar movimientos repetitivos mientras se mueven por un entorno natural inmersivo.This project aims to develop a functional Virtual Reality application for the rehabilitation and well-being of older adults in nursing homes. It intends to engage the patient in the rehabilitation treatment by means of Virtual Reality games. To play these games, the patient must execute repetitive movements while moving around in an immersive natural environment.Objectius de Desenvolupament Sostenible::3 - Salut i Benesta

Virtual reality application for rehabilitation

Aquest projecte té com a objectiu desenvolupar una aplicació de Realitat Virtual funcional per a la rehabilitació i el benestar de la gent gran en residències d’avis. El que es pretén és complementar el tractament de rehabilitació dels pacients mitjançant jocs de Realitat Virtual que els permetin realitzar moviments repetitius mentre es mouen per un entorn natural immersiu.Este proyecto tiene como objetivo desarrollar una aplicación de Realidad Virtual funcional para la rehabilitación y el bienestar de las personas mayores en residencias de ancianos. Lo que se pretende es complementar el tratamiento de rehabilitación de los pacientes mediante juegos de Realidad Virtual que les permitan realizar movimientos repetitivos mientras se mueven por un entorno natural inmersivo.This project aims to develop a functional Virtual Reality application for the rehabilitation and well-being of older adults in nursing homes. It intends to engage the patient in the rehabilitation treatment by means of Virtual Reality games. To play these games, the patient must execute repetitive movements while moving around in an immersive natural environment.Objectius de Desenvolupament Sostenible::3 - Salut i Benesta

Digital System Design - Use of Microcontroller

Embedded systems are today, widely deployed in just about every piece of machinery from toasters to spacecraft. Embedded system designers face many challenges. They are asked to produce increasingly complex systems using the latest technologies, but these technologies are changing faster than ever. They are asked to produce better quality designs with a shorter time-to-market. They are asked to implement increasingly complex functionality but more importantly to satisfy numerous other constraints. To achieve the current goals of design, the designer must be aware with such design constraints and more importantly, the factors that have a direct effect on them.One of the challenges facing embedded system designers is the selection of the optimum processor for the application in hand; single-purpose, general-purpose or application specific. Microcontrollers are one member of the family of the application specific processors.The book concentrates on the use of microcontroller as the embedded system?s processor, and how to use it in many embedded system applications. The book covers both the hardware and software aspects needed to design using microcontroller.The book is ideal for undergraduate students and also the engineers that are working in the field of digital system design.Contents• Preface;• Process design metrics;• A systems approach to digital system design;• Introduction to microcontrollers and microprocessors;• Instructions and Instruction sets;• Machine language and assembly language;• System memory; Timers, counters and watchdog timer;• Interfacing to local devices / peripherals;• Analogue data and the analogue I/O subsystem;• Multiprocessor communications;• Serial Communications and Network-based interfaces