High Performance Optical Transmitter Ffr Next Generation Supercomputing and Data Communication

High speed optical interconnects consuming low power at affordable prices are always a major area of research focus. For the backbone network infrastructure, the need for more bandwidth driven by streaming video and other data intensive applications such as cloud computing has been steadily pushing the link speed to the 40Gb/s and 100Gb/s domain. However, high power consumption, low link density and high cost seriously prevent traditional optical transceiver from being the next generation of optical link technology. For short reach communications, such as interconnects in supercomputers, the issues related to the existing electrical links become a major bottleneck for the next generation of High Performance Computing (HPC). Both applications are seeking for an innovative solution of optical links to tackle those current issues. In order to target the next generation of supercomputers and data communication, we propose to develop a high performance optical transmitter by utilizing CISCO Systems®\u27s proprietary CMOS photonic technology. The research seeks to achieve the following outcomes: 1. Reduction of power consumption due to optical interconnects to less than 5pJ/bit without the need for Ring Resonators or DWDM and less than 300fJ/bit for short distance data bus applications. 2. Enable the increase in performance (computing speed) from Peta-Flop to Exa-Flops without the proportional increase in cost or power consumption that would be prohibitive to next generation system architectures by means of increasing the maximum data transmission rate over a single fiber. 3. Explore advanced modulation schemes such as PAM-16 (Pulse-Amplitude-Modulation with 16 levels) to increase the spectrum efficiency while keeping the same or less power figure. This research will focus on the improvement of both the electrical IC and optical IC for the optical transmitter. An accurate circuit model of the optical device is created to speed up the performance optimization and enable co-simulation of electrical driver. Circuit architectures are chosen to minimize the power consumption without sacrificing the speed and noise immunity. As a result, a silicon photonic based optical transmitter employing 1V supply, featuring 20Gb/s data rate is fabricated. The system consists of an electrical driver in 40nm CMOS and an optical MZI modulator with an RF length of less than 0.5mm in 0.13&mu m SOI CMOS. Two modulation schemes are successfully demonstrated: On-Off Keying (OOK) and Pulse-Amplitude-Modulation-N (PAM-N N=4, 16). Both versions demonstrate signal integrity, interface density, and scalability that fit into the next generation data communication and exa-scale computing. Modulation power at 20Gb/s data rate for OOK and PAM-16 of 4pJ/bit and 0.25pJ/bit are achieved for the first time of an MZI type optical modulator, respectively

High Speed Test Interface Module Using MEMS Technology

With the transient frequency of available CMOS technologies exceeding hundreds of gigahertz and the increasing complexity of Integrated Circuit (IC) designs, it is now apparent that the architecture of current testers needs to be greatly improved to keep up with the formidable challenges ahead. Test requirements for modern integrated circuits are becoming more stringent, complex and costly. These requirements include an increasing number of test channels, higher test-speeds and enhanced measurement accuracy and resolution. In a conventional test configuration, the signal path from Automatic Test Equipment (ATE) to the Device-Under-Test (DUT) includes long traces of wires. At frequencies above a few gigahertz, testing integrated circuits becomes a challenging task. The effects on transmission lines become critical requiring impedance matching to minimize signal reflection. AC resistance due to the skin effect and electromagnetic coupling caused by radiation can also become important factors affecting the test results. In the design of a Device Interface Board (DIB), the greater the physical separation of the DUT and the ATE pin electronics, the greater the distortion and signal degradation. In this work, a new Test Interface Module (TIM) based on MEMS technology is proposed to reduce the distance between the tester and device-under-test by orders of magnitude. The proposed solution increases the bandwidth of test channels and reduces the undesired effects of transmission lines on the test results. The MEMS test interface includes a fixed socket and a removable socket. The removable socket incorporates MEMS contact springs to provide temporary with the DUT pads and the fixed socket contains a bed of micro-pins to establish electrical connections with the ATE pin electronics. The MEMS based contact springs have been modified to implement a high-density wafer level test probes for Through Silicon Vias (TSVs) in three dimensional integrated circuits (3D-IC). Prototypes have been fabricated using Silicon On Insulator SOI wafer. Experimental results indicate that the proposed architectures can operate up to 50 GHz without much loss or distortion. The MEMS probes can also maintain a good elastic performance without any damage or deformation in the test phase

OPTIMAL MEMS PLATE DESIGN AND CONTROL FOR LARGE CHANNEL COUNT OPTICAL SWITCHES

The design and control of an optimal mirror plate actuator suitable for large channel count MEMS optical switch applications is researched. An optimal plate actuator structure is presented. Its performance in equilibrium status is analyzed. A design example, which is confirmed by ANSYS simulation, is given along with a design methodology. By considering the squeeze film damping effects, the transient response of this optimal plate actuator is performed. The system stability is proven by using a Lyapunov function and the Routh-Hurwitz test. A conclusion is that the optimal tilted bottom plate can stably approach the maximum tilt angle with the minimum applied actuating voltage, which is one-half of the present industry standard actuating voltage. A four-level stage structure is given as an example of a practical multi-step realization of such an optimal plate structure. A feedback control system is described using a sensing bridge with a sensing capacitor. Two optimal control methodologies are described, these being fast switching bang-bang control and closed loop feedback control. A high voltage driving circuit is introduced along with design equations based on the special features needed in MEMS mirrors. In addition, by introducing a shift register, a modular architecture to control MEMS mirrors for scalable embedded systems is described. By using this modular structure with its shift register, the system can be scaled when there is a future need to increase channel counts. Overall, this research improves upon the performance of large channel count MEMS optical switches. It achieves low actuating voltage by reducing by one-half of the present industry standard actuating voltage, that is, a reduction from 250V to 120V. By using the new high voltage driving circuit, it cuts in half the number of required control actuating voltages. It obtains a scalable structure for the embedded system, which is beneficial to cost reduction, future maintainability and design simplification. It provides optimal control to switch the mirrors in order to achieve the minimum switching time and to maintain the stability of the system in the appearance of any perturbation

Roadmapping the Next Generation of Silicon Photonics

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem

Advances in Solid State Circuit Technologies

This book brings together contributions from experts in the fields to describe the current status of important topics in solid-state circuit technologies. It consists of 20 chapters which are grouped under the following categories: general information, circuits and devices, materials, and characterization techniques. These chapters have been written by renowned experts in the respective fields making this book valuable to the integrated circuits and materials science communities. It is intended for a diverse readership including electrical engineers and material scientists in the industry and academic institutions. Readers will be able to familiarize themselves with the latest technologies in the various fields

Characterization of wavelength tunable lasers for use in wavelength packet switched networks

The telecom industry's greatest challenge, and the optical systems and components vendors' biggest opportunity is enabling providers to expand their data services. The solution lies in making optical networks more responsive to customer needs, i.e., making them more rapidly adaptable. One possible technique to achieve this is to employ wavelength tunable optical transmitters. The importance of tunability grows greater every year, as the average number of channels deployed on DWDM platforms increases. By deploying tunable lasers it is much easier to facilitate forecasting, planning and last minute changes in the network. This technology provides with solution for inventory reduction. It also offers solution for fast switching at packet level. The conducted research activities of the project was divided in two work packages: 1. Full static characterization-the laser used in the experiment was a butterfly-packaged Sampled Grating DBR laser with four electrically tunable sections. LabView programme was developed for distant control of the equipment and the laser itself. The parameters required for creating a look-up table with the exact currents for the four sections of the laser, namely wavelength, side mode suppression ratio and output power, were transferred to tables. Based on those tables the currents were defined for each of the 96 different accessible channels. The channel allocation is based on the 50 GHz spacing grid. A detailed analysis of the tuning mechanisms is provided. 2. Dynamic characterization and BER performance in wavelength packet switched WDM systems-a commercially available module was used supplied with the software package for controlling the wavelength channels and setting the laser to switch between any accessible channel. The laser is DBR laser without SOA integration so the dynamic tunability can be investigated. As the switching in the nanosecond regime is executed in the electrical domain, analysis of the switching parameters concerning the electrical circuit as well as laser structure is provided. The actual switching time was defined. The degradation in system performance due to spurious wavelength signals emitted from the tunable module during the switching event and their interference with other active channels was demonstrated by examining the presence of an error floor in the BER rate against received power measurements

Microelectromechanical Systems and Devices

The advances of microelectromechanical systems (MEMS) and devices have been instrumental in the demonstration of new devices and applications, and even in the creation of new fields of research and development: bioMEMS, actuators, microfluidic devices, RF and optical MEMS. Experience indicates a need for MEMS book covering these materials as well as the most important process steps in bulk micro-machining and modeling. We are very pleased to present this book that contains 18 chapters, written by the experts in the field of MEMS. These chapters are groups into four broad sections of BioMEMS Devices, MEMS characterization and micromachining, RF and Optical MEMS, and MEMS based Actuators. The book starts with the emerging field of bioMEMS, including MEMS coil for retinal prostheses, DNA extraction by micro/bio-fluidics devices and acoustic biosensors. MEMS characterization, micromachining, macromodels, RF and Optical MEMS switches are discussed in next sections. The book concludes with the emphasis on MEMS based actuators

VLSI Design

This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc