Steady state distribution of a hyperbolic digital tanlock loop with extended pull-in range for frequency synchronization in high doppler environment

A hyperbolic arctan based Digital Tanlock Loop (D-TLL) operating with complex signals at base-band or intermediate frequencies in high Doppler environments is treated here. The arctan based loop, known as the tanlock loop (TLL), is used in software defined radio architectures for frequency acquisition and tracking. The hyperbolic nonlinearity intentionally introduced within the phase detector extends the pull-in range of the frequency for a given loop, compared to the normal D-TLL, allowing a wider frequency acquisition range which is suitable for high Doppler communications environment. In this paper we study the steady state phase noise performances of such a feedback loop for additive Gaussian noise using stochastic analysis. The stochastic model of a first-order hyperbolic loop and the theoretical analysis for the corresponding statistical distribution of the closed loop steady state phase noise are presented. The theoretical results are also verified by simulations

Tanlock based loop with improved performance

This thesis is focused on the design, analysis, simulation and implementation of new improved architectures of the Time Delay Digital Tanlock Loop (TDTL) based digital phase-locked loop (DPLL). The proposed architectures overcome some fundamental limitations exhibited by the original TDTL. These limitations include the presence of nonlinearity in the phase detector (PD), the non-zero phase error of the first-order loop, the restricted locking range, particularly of the second-order loop, the limited acquisition speed and the noise performance. Two approaches were adopted in this work to alleviate these limitations: the first involved modifying the original TDTL through the incorporation of auxiliary circuit blocks that enhance its performance, whilst the second involved designing new tanlock-based architectures. The proposed architectures, which resulted from the above approaches, were tested under various input signal conditions and their performance was compared with the original TDTL. The proposed architectures demonstrated an improvement of up to fourfold in terms of the acquisition times, twofold in noise performance and a marked enhancement in the linearity and in the locking range. The effectiveness of the proposed tanlock-based architectures was also assessed and demonstrated by using them in various applications, which included FM demodulation, FM threshold extension, FM demodulation with improved THD (total harmonic distortion), and Doppler effect improvement. The results from these applications showed that the performance of the new architectures outperformed the original TDTL. Real-time performance of these architectures was evaluated through implementation of some of them on an FPGA (field-programmable gate array) based system. Practical results from the prototype FPGA based implementations confirmed the simulation results obtained from MATLAB/Simulink

Signal distortion in a regenerative frequency divider

A regenerative frequency divider can be constructed with one integrated circuit and a single-pole tuned circuit. The divider can be used as a means for reducing the modulation index of either deterministic or random signals. This reduction in modulation index can simplify many signal processing schemes. This technique can be used up to S-band frequencies. The mathematical model of the regenerative frequency divider corresponds very closely to that of a first order Phase Locked Loop (PLL). The loop gain is determined in part by the nonlinear element used in the feedback loop. The loop gain is also proportional to the ratio of the input envelope amplitude and the output envelope amplitude. Theoretical and measured performance of the regenerative frequency divider indicates that it is slightly superior to that of the first order PLL for processing nondeterministic signals such as a frequency modulated signal corrupted by wide-band Gaussian noise. Measured performance on a divide by two shows that the probability of cycle skipping for carrier plus wide-band Gaussian noise is an order of magnitude less than the corresponding PLL for a loop signal-to-noise ratio of 5dB. The similarity between higher order PLL models and the regenerative frequency divider with higher order loop filters is very close when the loop error is small --Abstract, page ii

NASA Tech Briefs, December 1988

This month's technical section includes forecasts for 1989 and beyond by NASA experts in the following fields: Integrated Circuits; Communications; Computational Fluid Dynamics; Ceramics; Image Processing; Sensors; Dynamic Power; Superconductivity; Artificial Intelligence; and Flow Cytometry. The quotes provide a brief overview of emerging trends, and describe inventions and innovations being developed by NASA, other government agencies, and private industry that could make a significant impact in coming years. A second bonus feature in this month's issue is the expanded subject index that begins on page 98. The index contains cross-referenced listings for all technical briefs appearing in NASA Tech Briefs during 1988

Signal processing using short word-length

Recently short word-length (normally 1 bit or bits) processing has become a promising technique. However, there are unresolved issues in sigma-delta modulation, which is the basis for 1b/2b systems. These issues hindered the full adoption of single-bit techniues in industry. Among these problems is the stability of high-order modulators and the limit cycle behaviour. More importantly, there is no adaptive LMS structure of any kind in 1b/2b domain. The challenge in this problem is the harsh quantization that prevents straightforward LMS application. In this thesis, the focus has been made on three axes: designing new single-bit DSP applications, proposing novel approaches for stability analysis, and tacking the unresolved problems of 1b/2b adaptive filtering. Two structures for 1b digital comb filtering are proposed. A ternary DC blocker structure is also presented and performanc e is tested. We also proposed a single-bit multiplierless DC-blocking structure. The stability of a single-bit high-order signma-delta modulator is studied under dc inputs. A new approach for stability analysis is proposed based on analogy with PLL analysis. Finally we succeeded in designing 1b/2b Wiener-like filtering and introduced (for the first time) three 1b/2b adaptive schemes

Aeronautical engineering: A continuing bibliography with indexes (supplement 304)

This bibliography lists 453 reports, articles, and other documents introduced into the NASA scientific and technical information system in May 1994. Subject coverage includes: design, construction and testing of aircraft and aircraft engines; aircraft components, equipment, and systems; ground support systems; and theoretical and applied aspects of aerodynamics and general fluid dynamics

Cumulative index to NASA Tech Briefs, 1986-1990, volumes 10-14

Tech Briefs are short announcements of new technology derived from the R&D activities of the National Aeronautics and Space Administration. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This cumulative index of Tech Briefs contains abstracts and four indexes (subject, personal author, originating center, and Tech Brief number) and covers the period 1986 to 1990. The abstract section is organized by the following subject categories: electronic components and circuits, electronic systems, physical sciences, materials, computer programs, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Survey of FPGA applications in the period 2000 – 2015 (Technical Report)

Romoth J, Porrmann M, Rückert U. Survey of FPGA applications in the period 2000 – 2015 (Technical Report).; 2017.Since their introduction, FPGAs can be seen in more and more different fields of applications. The key advantage is the combination of software-like flexibility with the performance otherwise common to hardware. Nevertheless, every application field introduces special requirements to the used computational architecture. This paper provides an overview of the different topics FPGAs have been used for in the last 15 years of research and why they have been chosen over other processing units like e.g. CPUs

Aeronautical enginnering: A cumulative index to a continuing bibliography (supplement 312)

This is a cumulative index to the abstracts contained in NASA SP-7037 (301) through NASA SP-7073 (311) of Aeronautical Engineering: A Continuing Bibliography. NASA SP-7037 and its supplements have been compiled by the Center for AeroSpace Information of the National Aeronautics and Space Administration (NASA). This cumulative index includes subject, personal author, corporate source, foreign technology, contract number, report number, and accession number indexes