Reset-sensing quasi-V2 single-inductor multiple-output buck converter with reduced cross-regulation

This paper proposes a reset-sensing quasi-V2 single-inductor multiple-output (SIMO) converter with minimal cross-regulation. The conventional quasi-V2 sensing scheme in SIMO converters suffers from serious cross-regulation which is primarily induced by the load differentiation with unbalanced loads. It is shown that the proposed reset-sensing quasi-V2 control scheme can significantly reduce cross-regulation by completely discharging the feed-forward sensing node to zero volts during the idle phase in Discontinuous Conduction Mode (DCM). The cross-regulation with the conventional quasi-V2 single-inductor dual-output (SIDO) converter for a load current step of 150 mA is experimentally verified to be more than 1.25 mV/mA. By employing the proposed quasi-V2 control method, the experimental results demonstrate that the cross-regulation for a load current step of 150 mA is significantly reduced to within 0.087 mV/mA. Hence, with the proposed scheme, a load transient in one output will have a minimal effect on the DC operating point of another output. This enables separate current control at each individually-driven output of a SIMO converter. © IEEE.published_or_final_versio

Analysis of an On-Line Stability Monitoring Approach for DC Microgrid Power Converters

An online approach to evaluate and monitor the stability margins of dc microgrid power converters is presented in this paper. The discussed online stability monitoring technique is based on the Middlebrook's loop-gain measurement technique, adapted to the digitally controlled power converters. In this approach, a perturbation is injected into a specific digital control loop of the converter and after measuring the loop gain, its crossover frequency and phase margin are continuously evaluated and monitored. The complete analytical derivation of the model, as well as detailed design aspects, are reported. In addition, the presence of multiple power converters connected to the same dc bus, all having the stability monitoring unit, is also investigated. An experimental microgrid prototype is implemented and considered to validate the theoretical analysis and simulation results, and to evaluate the effectiveness of the digital implementation of the technique for different control loops. The obtained results confirm the expected performance of the stability monitoring tool in steady-state and transient operating conditions. The proposed method can be extended to generic control loops in power converters operating in dc microgrids

Modelling and regulation of dual-output LCLC resonant converters

The analysis, design and control of 4th-order LCLC voltage-output series-parallel resonant converters (SPRCs) for the provision of multiple regulated outputs, is described. Specifically, state-variable concepts are employed and new analysis techniques are developed to establish operating mode boundaries with which to describe the internal behaviour of a dual-output resonant converter topology. The designer is guided through the most important criteria for realising a satisfactory converter, and the impact of parameter choices on performance is explored. Predictions from the resulting models are compared with those obtained from SPICE simulations and measurements from a prototype power supply under closed loop control

Analysis and control of dual-output LCLC resonant converters with significant leakage inductance

The analysis, design and control of fourth-order LCLC voltage-output series-parallel resonant converters for the provision of multiple regulated outputs, is described. Specifically, state-variable concepts are developed to establish operating mode boundaries with which to describe the internal behavior and the impact of output leakage inductance. The resulting models are compared with those obtained from SPICE simulations and measurements from a prototype power supply under closed loop control to verify the analysis, modeling, and control predictions

Dual-frequency single-inductor multiple-output (DF-SIMO) power converter topology for SoC applications

Modern mixed-signal SoCs integrate a large number of sub-systems in a single nanometer CMOS chip. Each sub-system typically requires its own independent and well-isolated power supply. However, to build these power supplies requires many large off-chip passive components, and thus the bill of material, the package pin count, and the printed circuit board area and complexity increase dramatically, leading to higher overall cost. Conventional (single-frequency) Single-Inductor Multiple-Output (SIMO) power converter topology can be employed to reduce the burden of off-chip inductors while producing a large number of outputs. However, this strategy requires even larger off-chip output capacitors than single-output converters due to time multiplexing between the multiple outputs, and thus many of them suffer from cross coupling issues that limit the isolation between the outputs. In this thesis, a Dual-Frequency SIMO (DF-SIMO) buck converter topology is proposed. Unlike conventional SIMO topologies, the DF-SIMO decouples the rate of power conversion at the input stage from the rate of power distribution at the output stage. Switching the input stage at low frequency (~2 MHz) simplifies its design in nanometer CMOS, especially with input voltages higher than 1.2 V, while switching the output stage at higher frequency enables faster output dynamic response, better cross-regulation, and smaller output capacitors without the efficiency and design complexity penalty of switching both the input and output stages at high frequency. Moreover, for output switching frequency higher than 100 MHz, the output capacitors can be small enough to be integrated on-chip. A 5-output 2-MHz/120-MHz design in 45-nm CMOS with 1.8-V input targeting low-power microcontrollers is presented as an application. The outputs vary from 0.6 to 1.6 V, with 4 outputs providing up to 15 mA and one output providing up to 50 mA. The design uses single 10-uH off-chip inductor, 2-nF on-chip capacitor for each 15-mA output and 4.5-nF for the 50-mA output. The peak efficiency is 73%, Dynamic Voltage Scaling (DVS) is 0.6 V/80 ns, and settling time is 30 ns for half-to-full load steps with no observable overshoot/undershoot or cross-coupling transients. The DF-SIMO topology enables realizing multiple efficient power supplies with faster dynamic response, better cross-regulation, and lower overall cost compared to conventional SIMO topologies

Scalability of Quasi-hysteretic FSM-based Digitally Controlled Single-inductor Dual-string Buck LED Driver To Multiple Strings

There has been growing interest in Single-Inductor Multiple-Output (SIMO) DC-DC converters due to its reduced cost and smaller form factor in comparison with using multiple single-output converters. An application for such a SIMO-based switching converter is to drive multiple LED strings in a multi-channel LED display. This paper proposes a quasi-hysteretic FSM-based digitally controlled Single-Inductor Dual-Output (SIDO) buck switching LED Driver operating in Discontinuous Conduction Mode (DCM) and extends it to drive multiple outputs. Based on the time-multiplexing control scheme in DCM, a theoretical upper limit of the total number of outputs in a SIMO buck switching LED driver for various backlight LED current values can be derived analytically. The advantages of the proposed SIMO LED driver include reducing the controller design complexity by eliminating loop compensation, driving more LED strings without limited by the maximum LED current rating, performing digital dimming with no additional switches required, and optimization of local bus voltage to compensate for variability of LED forward voltage (VF) in each individual LED string with smaller power loss. Loosely-binned LEDs with larger VF variation can therefore be used for reduced LED costs.postprin

Dual-frequency dual-inductor multiple-outputs (DF-DIMO) buck converter topologies with fully-integrated output filters

In multi-core DSPs, there is a need for multiple independent power supplies to power the digital cores. Each power supply needs to have fast dynamic response and must support a wide range of output voltage with up to hundreds of mA load current. In this dissertation, the key performance metrics in power converter design are introduced, the advantages and dis-advantages of the conventional power converter topology are analyzed and a new Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) buck converter topology is presented to improve the limitations of the conventional topologies. The proposed topology employs a dual-phase 20-MHz current-mode-controlled input stage to reduce the inductance required per phase to only 200 nH, and a 4-output 100-MHz comparator-controlled fully-integrated output stage to reduce the capacitance required per output to 10 nF. To enable each output to handle up to 250-mA load with less than 40-mV voltage ripple, a 3rd-order bond-wire-based notch filter is employed at each output for voltage ripple suppression. Additionally, the proposed design employs dynamic output re-ordering to enhance dynamic and cross-regulation performance, interleaved pulse-skipping to enhance light-load efficiency, and high-gain local output feedback to enhance DC load Regulation. Targeting multi-core DSPs, the proposed design is implemented in standard 65-nm CMOS technology with 1.8-V input, and outputs in the range of 0.6–1.2 V with a total load of 1 A. It achieves a peak efficiency of 74%, less than 40-mV output voltage ripple, 0.5-V/70-ns Dynamic Voltage Scaling (DVS), and settling time of less than 85 ns for 125-mA all with no cross regulations

High-power converters for space applications

Phase 1 was a concept definition effort to extend space-type dc/dc converter technology to the megawatt level with a weight of less than 0.1 kg/kW (220 lb./MW). Two system designs were evaluated in Phase 1. Each design operates from a 5 kV stacked fuel cell source and provides a voltage step-up to 100 kV at 10 A for charging capacitors (100 pps at a duty cycle of 17 min on, 17 min off). Both designs use an MCT-based, full-bridge inverter, gaseous hydrogen cooling, and crowbar fault protection. The GE-CRD system uses an advanced high-voltage transformer/rectifier filter is series with a resonant tank circuit, driven by an inverter operating at 20 to 50 kHz. Output voltage is controlled through frequency and phase shift control. Fast transient response and stability is ensured via optimal control. Super-resonant operation employing MCTs provides the advantages of lossless snubbing, no turn-on switching loss, use of medium-speed diodes, and intrinsic current limiting under load-fault conditions. Estimated weight of the GE-CRD system is 88 kg (1.5 cu ft.). Efficiency of 94.4 percent and total system loss is 55.711 kW operating at 1 MW load power. The Maxwell system is based on a resonance transformer approach using a cascade of five LC resonant sections at 100 kHz. The 5 kV bus is converted to a square wave, stepped-up to a 100 kV sine wave by the LC sections, rectified, and filtered. Output voltage is controlled with a special series regulator circuit. Estimated weight of the Maxwell system is 83.8 kg (4.0 cu ft.). Efficiency is 87.2 percent and total system loss is 146.411 kW operating at 1 MW load power

Quad- bus motor drive system for electrified vehicles based on a dual- output- single- inductor structure

Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/163903/1/elp2bf00838.pd

Programmable Topology Derivation and Analysis of Integrated Three-Port DC-DC Converters with Reduced Switches for Low-Cost Applications

© 1982-2012 IEEE. Thanks to the favorable advantage of low cost, integrated three-port dc-dc converters with reduced switches have attracted extensive attention. In order to provide more new topologies, this paper aims to propose a programmable topology derivation method, which effectively simplifies the cumbersome process of the conventional combination method. Instead of the manual connection and examination, the proposed alternative can quickly and rigorously derive multiple viable integrated three-port dc-dc topologies from a great number of possible connections with the aid of computer program. Besides, generalized analysis is also accomplished, with which performance characteristics of all derived converters are simultaneously obtained and then a comprehensive comparison can be easily conducted to select a preferred one for the practical application. Finally, an example-specific application with one input and two outputs is given, with topology selection, design, and experimental results demonstrated in detail