STUDY ON THE REDUCTION OF ACCESS RESISTANCE OF INAIN/GAN HIGH ELECTRON MOBILITY TRANSISTORS

Ph.DDOCTOR OF PHILOSOPH

Advanced GaN HEMT technology for millimetre-wave amplifiers

Gallium Nitride (GaN)-based High-Electron-Mobility Transistor (HEMT) technology is a breakthrough innovation in the semiconductor industry, offering high-frequency and high-power performance capabilities. GaN HEMTs are widely used in power electronics, wireless communication systems, and radar applications over the past two decades. The key advantages of GaN HEMTs to produce heterojunctions to larger bandgap materials Aluminium Gallium Nitride (AlGaN) and the heterostructure results in the formation of the 2- dimensional electron gas (2DEG) which exhibits high electron mobilities of upto 2000 cm²/V.s and high saturation velocity of 2×10⁷ cm/s, resulting in high switching speeds and power densities. Due to its wide bandgap of 3.4 eV, it also allows exceptionally high breakdown fields of 3.3 MV/cm. In this thesis, the focus is on the major challenges in the development of GaN HEMT technology including achieving a low resistance ohmic contact, reducing self-heating, and improving device high frequency performance. Due to the wide bandgap of III-nitride semiconductors, achieving low-resistance Ohmic contact resistance is difficult. Recessing the Ohmic region prior to metallization is a typical approach to lowering the contact resistance. The contact resistance is often minimised by optimising factors such as recess depth, anneal temperature, and metal stack design. In this work, the three approaches involving the recessing of the ohmic region were evaluated. The Ohmic contact area was recessed in patterns similar to a chess board, vertical recessed stripes, and horizontal recessed strips. The two different recess etch depths, shallow and deep etch depths of 9 nm and 30 nm, respectively, were investigate. The lowest contact resistance of 0.32 Ω.mm (compared to 0.59 Ω.mm for a conventional non-recessed Ohmic contact) was observed for a deep horizontal patterned structure. The results also indicate that a highly reproducible process. The other major issue to address was to reduce the impact of device self-heating by effective heat distribution and dissipation. A novel thermal management technique was proposed, and the preliminary results are promising. It exploits the very thin epitaxial layer stack of a buffer-less GaN-on-SiC HEMT structure. III-V nitride material is etched and removed from around the active device area and the Au bond pad electrodes sit directly on the SiC substrate, providing a route for thermal dissipation from the active device to the substrate. This approach was demonstrated to reduce device self-heating and to improve the current density of the device. We fabricated and compared the performance of devices fabricated on the buffer-free and conventional GaN HEMTs. For identically sized 2-μm gate long, two-finger 2 × 50 μm gate width device with a gate to drain spacing of 3 m, the conventional devices broke down at 186 V while for the buffer-free structure, it was over 200 V (above the measurement capability of our equipment). The maximum drain current density of ~631 mA/mm and ~ 686 mA/mm biased at VGS = 1 V for the two-finger 2 × 50 μm gate wide for buffer free and conventional GaN structure, respectively. The buffer free and conventional GaN structure devices were measured to determine their maximum cut-off frequency (fT) and maximum oscillation frequency (fmax) when biased at VDS = 15V. The lower gate leakage currents were observed for the fabricated buffer-free AlGaN/GaN HEMT device as compared to conventional GaN HEMTs 197μA and 260μA, respectively. Also, the buffer free device, which had two fingers each measuring 2x200 μm, yielded measurements of 4.6 GHz for fT and 9.8 GHz for fmax. The conventional GaN device, also with two fingers each measuring 2x200 μm, was tested and resulted in measurements of 6.3 GHz for fT and 14.7 GHz for fmax. These results demonstrate the high quality of the buffer-free GaN heterostructure despite the absence of thick transition layers as currently used in the conventional GaN HEMTs. This indicates that the "buffer-free" design has the potential to be useful for millimetre wave applications in the future. This thesis also describes the fabrication and characterisation of a 100 nm footprint Ni/Au-based T-gate HEMT, 2x25 μm gate width, 1.5 μm drain source spacing, 100nm Si₃N₄ passivation layer thickness and device exhibit quite high peak currents of 805mA/mm and peak transconductance value of 246 mS/mm due to the low thermal boundary resistance on this buffer free epilayer wafer. The breakdown voltage was measured 47 Volts. Yielding a cut-off frequency fT of 87 GHz and maximum oscillation frequency fₘₐₓ of 143 GHz. We have developed a method for fabricating a T-shaped gate for sub 100nm gate foot length. The 100 nm length results in robustness, repeatable and has a high yield. Our findings indicate that this gate design could be beneficial for AlGaN/GaN buffer-free HEMTs used in millimetre wave frequency applications

Buffer Related Dispersive Effects in Microwave GaN HEMTs

In applications such as mobile communication and radar, microwave power generation at high frequency is of utmost importance. The GaN HEMT offers a unique set of properties that makes it suitable for high power amplification at high frequencies. However, their performance is limited by trap states, leading to reduced output power and time variant effects. Furthermore, for good high frequency performance a high efficiency it is essential to limit the access resistances in the transistor. The GaN HEMT technology has long lacked a good ohmic contact with good reproducibility.\ua0In this thesis, three buffer designs are considered; C-doped GaN, AlGaN back barriers and a thin GaN structure. The three designs are evaluated in terms of trapping effects using the drain current transient technique. For the C-doped GaN buffer, trapping at dislocations covered with C-clusters is believed to be the main factor limiting output power. Dislocations are presumed to play a major role for the trapping behavior of AlGaN back barriers and the thin structure as well. The maximum output powers for C-doped GaN, AlGaN back barriers and the thin structure are 3.3, 2.7, and 3.9 W/mm at 30 GHz. The output power is found to be limited by trapping effects for all buffer designs. Moreover, a Ta-based, recessed ohmic contact enables a contact resistance of down to 0.14 Ωmm. The results also indicate that a highly reproducible process might be possible for deeply recessed contacts. An optimized AlGaN/GaN interface shows high mobility \textgreater2000 cm2/Vs without the use of an AlN-exclusion layer. The improved interface also decreases trapping effects and the gate-source capacitance at large electric fields compared to an unoptimized interface

A Source and Drain Transient Currents Technique for Trap Characterisation in AlGaN/GaN HEMTs

The source/drain and gate induced charge trapping within an AlGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μs to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time (1ms). The bulk charge trapping is found to occur during both ON and OFF states of the device when VDS>0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient

GaN HEMT technology for W-band frequency applications

Owing to the technological advancement, and rapid industrial growth which stimulate a rapidly growing demand for more efficient transistor devices for high-power high-frequency applications, gallium nitride (GaN) material has been one of the most intensively researched semiconductor materials in the past two decades. Apart from its exceptional material properties, GaN exhibits a unique attribute of an ability to generate a sheet of high density highly mobile two dimensional electron gas (2DEG) without the need of any intentional doping. Due to the high mobility (~2000 cm2/V.s) and concentration (1X1013 cm-2) of the 2DEG, and the large energy band gap (3.4 eV), gallium nitride devices can efficiently deliver high-power at high operating frequencies. Its low intrinsic carrier density (~10-12/cm3) enables operating GaN devices at much high operating temperatures than other conventional semiconductor materials. Despite this propound potential, due to some critical performance and reliability challenges, GaN transistors are yet to meet an acceptable industrial performance which leads to still limited deployment in the semiconductor market for electronic applications. The focus of this project is to improve in the device processing technology which has been one of the major causes of poor performance of GaN devices in high-power high-frequency applications. GaN devices suffer from high ohmic contact resistance, gate-to-source capacitance CGS, and inefficient heat dissipation property which severely results in high power losses, low efficiency, and low cutoff frequency. These affects the output power and high-frequency parameters (such as the unit power gain fmax and unit current gain ft cut-off frequencies). The conventional method of realising low ohmic contact using heavily doped GaN contact layer requires complex and time-consuming regrowth processes. In this work, we present a new approach of realising low ohmic contacts using the heavily doped GaN cap layer technique, but without regrowth. Instead of using the usual undoped 2 nm GaN cap layer, the approach involves growing a heavily doped 5 nm GaN cap layer with a Si-doping density of 1x1019 cm3 on the AlN/GaN HEMT using molecular beam epitaxy (MBE). This technique is cost effective and minimises complexity and processing time. We obtain a very low ohmic contact resistance of 0.132 Ω.mm with 428 Ω/sq sheet resistance, for AlN (aluminium nitride) barrier GaN high electron mobility transistors (HEMTs). Reduction of gate length is required to realise a high-frequency device. However, such reduction results in high gate resistance which affects the maximum cut-off frequency of the device. A T-shape structure of gate is normally used to reduce the gate resistance. Because of the need of very small gate lengths in high-frequency devices, any further reduction of the gate length to sub-100 nm, could lead to a severe instability due to weakening mechanical strength of the gate structure. This has become a serious reliability concern, and consequently the T-shape gate is conventionally supported using thick passivation layer of dielectric materials such as Si3N4. This layer in turn results in an unwanted parasitic capacitance which affect the frequency performance of the device. In this work, we present a new fabrication technique which yields a robust and stable T-shape gate structure without the use of any supporting insulator such as Si3N4. While this approach has not been tested on a full wafer (>4 inches) yet, it shows promising potential for using it in commercial manufacturing. In another strand of the research, we have demonstrated the benefit of AlGaN/GaN HEMTs on diamond as efficient heat extraction mechanism for GaN devices by using three identical AlGaN/GaN on diamond wafers with varying thicknesses of GaN buffer and the diamond substrates. Due to the efficient heat extraction property, a transistor with high power density, effective unity power gain and current-gain cut-off frequencies of 32.04 W/mm at VGS = 0 V and VDS = 60 V, 90 GHz and 128 GHz are realised, respectively. We analysed the impact of the buffer and substrate thicknesses and found that self-heating of the device is less in devices with thinner diamond substrate and even lesser when the buffer is thinner

AlGaN/GaN based enhancement mode MOSHEMTs

This thesis describes a new gallium nitride (GaN) based transistor technology for electronic switching applications. Conventional GaN based transistors are of the high electron mobility transistor (HEMT) type and are depletion mode devices. These are not suitable for switching applications since an extra DC supply is required to bias the device in the cut-off (off-state) region and the devices are not fail-safe, i.e. incase of malfunction a short-circuit can exist between the main DC supply and ground. Enhancement mode (E-Mode) or normally-off devices can overcome these limitations and if realized in the GaN material system would benefit from the good material properties that support large breakdown voltages and low On-resistances. Fabrication of high performace E-mode GaN devices with low On-resistance and high breakdown voltage still remains a big challenge to date. In this thesis a new method for realizing enhancement mode aluminium gallium nitride - gallium nitride (AlGaN/GaN) devices using a localized gate-foot oxidation has been described. Thermal oxidation of the AlGaN barrier layer converts the top surface/part of this layer into aluminium oxide (Al2 O3 ) and gallium oxide (Ga2O3 ), which serve as a good gate dielectric and improve the gate leakage current by several orders of magnitude compared to a Schottky gate. The oxidation process leaves a thinner AlGaN barrier which can result in normally o§ operation. Without special precaution, however, the oxidation of the AlGaN barrier is not uniform from the top but occurs at higher rates at the defect/dislocation sites. This makes it impossible to control the barrier thickness and so rendering the barrier useless. To avoid the problem of non-uniform oxidation, a thin layer of aluminum is first deposited on the barrier layer and oxidized to form aluminium oxide on top. This additional oxide layer seems to ensure uniform oxidation of the AlGaN barrier layer underneath on subsequent further oxidation. Results of the fabricated 2 um x 100 um AlGaN/GaN MOS-HEMTs with a partially oxidized barrier layer showed a threshold voltage of -0.5 V (compared to -3 V for a Schottky devive fabricated on the same epilayer structure) and a maximum drain current of 800mA/mm at high gate bias of 5 V with very little current compression. The peak extrinsic transconductance of the device is 160 mS/mm at a drain-source voltage of 10 V with a very low specific On-resistance of 9:8 ohm.mm2 and an off-state breakdown voltage higher than 42 V. Capacitance-Voltage (C-V) measurements of Al2O3 /AlGaN /GaN circular test metal-oxide-semiconductor structures were observed and measured. They exhibit no hysteresis, indicating the good quality of the thermally grown aluminium oxide for realizing AlGaN/GaN based E-Mode devices for high frequency and high power applications

A Parametric Technique for Traps Characterization in AlGaN/GaN HEMTs

A new parametric and cost-effective tech- nique is developed to decouple the mechanisms behind current degradation in AlGaN/GaN HEMTs under a nor- mal device operation: self-heating and charge trapping. A unique approach that investigates charge trapping using both source (IS) and drain (ID) transient currents for the first time. Two types of charge trapping mechanisms are identified: (i) bulk charge trapping occurring on a time scale of less than 1 ms, followed by (ii) surface charge trapping with a time constant larger than a millisecond. Through monitoring the difference between IS and ID, a bulk charge trapping time constant is found to be independent of both drain (VDS ) and gate (VGS ) biases. Surface charge trapping is found to have a much greater impact on a slow degrada- tion when compared to bulk trapping and self-heating. At a short timescale ( 1 ms), the dynamic ON resistance degradation is predominantly limited by surface charge trapping

Tuning of electrical properties in InAlN/GaN HFETs and Ba0.5Sr0.5TiO3/YIG Phase Shifters

Engineers know well from an early point in their training the trials and tribulations of having to make design tradeoffs in order to optimize one performance parameter for another. Discovering tradeoff conditions that result in the elimination of a loss associated with the enhancement of some other parameter (an improvement over a typical tradeoff), therefore, ushers in a new paradigm of design in which the constraints which are typical of the task at hand are alleviated. We call such a design paradigm “tuning” as opposed to “trading off”, and this is the central theme of this work. We investigate two types of microwave electronic devices, namely GaN-based heterostructure field effect transistors (HFETs) and tunable ferroelectric-ferrite-based microwave phase shifters. The “tuning” associated with these types of devices arises from the notion of an optimal 2DEG density, capable of achieving higher performance in terms of electron velocity and enhanced reliability in the case of the HFET, and the coupling of ferroelectric and ferrite materials in tunable microwave phase shifters, capable of achieving high differential phase shifts while at the same time mitigating the losses associated with impedance mismatching which typically arise when the phase is tuned. Promises and problems associated with HFET devices based on the intriguing InAlN/GaN material system will be described. We focus on the fundamental problem associated with the induction of the large density of carriers at the interface, namely the disintegration of an excess of longitudinal optical phonons (hot phonons) in the channel. We use microwave measurements in conjunction with stress tests to evidence the existence of an optimal 2DEG density wherein the hot phonon effect can be “tuned,” which allows for enhanced high frequency performance as well as device reliability. Next, we focus on the design, fabrication, and measurement of tunable phase shifters consisting of thin films of BaxSr1-xTiO3 (BST), which has the advantage of having high dielectric tunability as well as relatively low microwave loss. We discuss the design, fabrication, and measurement of a simple coplanar waveguide (CPW) type of phase shifter as well as a more complicated “hybrid” phase shifter consisting of a ferrite (YIG) in addition to BST. The use of such a bilayer allows one to “tune” the impedance of the phase shifters independently of the phase velocity through careful selection of the DC biasing magnetic fields, or alternatively through the use of an additional piezoelectric layer, bonded to YIG whose permeability can then be tuned through magnetostriction

A Parametric Technique for Traps Characterization in AlGaN/GaN HEMTs

A new parametric and cost-effective technique is developed to decouple the mechanisms behind current degradation in AlGaN=GaN HEMTs under a normal device operation: self-heating and charge trapping. Our unique approach investigates charge trapping using both source (IS) and drain (ID) transient currents for the first time. Two types of charge trapping mechanisms are identified: (i) bulk charge trapping occurring on a time scale of less than 1 ms, followed by (ii) surface charge trapping with a time constant larger than a millisecond. Through monitoring the difference between IS and ID, a bulk charge trapping time constant is found to be independent of both drain (VDS) and gate (VGS) biases. Surface charge trapping is found to have a much greater impact on a slow degradation when compared to bulk trapping and self-heating. At a short timescale ( 1 ms), the dynamic ON resistance degradation is predominantly limited by surface charge trapping