A survey of carbon nanotube interconnects for energy efficient integrated circuits

This article is a review of the state-of-art carbon nanotube interconnects for Silicon application with respect to the recent literature. Amongst all the research on carbon nanotube interconnects, those discussed here cover 1) challenges with current copper interconnects, 2) process & growth of carbon nanotube interconnects compatible with back-end-of-line integration, and 3) modeling and simulation for circuit-level benchmarking and performance prediction. The focus is on the evolution of carbon nanotube interconnects from the process, theoretical modeling, and experimental characterization to on-chip interconnect applications. We provide an overview of the current advancements on carbon nanotube interconnects and also regarding the prospects for designing energy efficient integrated circuits. Each selected category is presented in an accessible manner aiming to serve as a survey and informative cornerstone on carbon nanotube interconnects relevant to students and scientists belonging to a range of fields from physics, processing to circuit design

Hybrid Nanomaterials

Two of the hottest research topics today are hybrid nanomaterials and flexible electronics. As such, this book covers both topics with chapters written by experts from across the globe. Chapters address hybrid nanomaterials, electronic transport in black phosphorus, three-dimensional nanocarbon hybrids, hybrid ion exchangers, pressure-sensitive adhesives for flexible electronics, simulation and modeling of transistors, smart manufacturing technologies, and inorganic semiconductors

Program FFlexCom — High frequency flexible bendable electronics for wireless communication systems

Today, electronics are implemented on rigid substrates. However, many objects in daily-life are not rigid — they are bendable, stretchable and even foldable. Examples are paper, tapes, our body, our skin and textiles. Until today there is a big gap between electronics and bendable daily-life items. Concerning this matter, the DFG Priority Program FFlexCom aims at paving the way for a novel research area: Wireless communication systems fully integrated on an ultra-thin, bendable and flexible piece of plastic or paper. The Program encompasses 13 projects led by 25 professors. By flexibility we refer to mechanical flexibility, which can come in flavors of bendability, foldability and, stretchability. In the last years the speed of flexible devices has massively been improved. However, to enable functional flexible systems and operation frequencies up to the sub-GHz range, the speed of flexible devices must still be increased by several orders of magnitude requiring novel system and circuit architectures, component concepts, technologies and materials

Radio frequency electronics on plastic

In this paper the recent progress of active high frequency electronics on plastic is discussed. This technology is mechanically flexible, bendable, stretchable and does not need any rigid chips. Indium Gallium Zinc Oxide (IGZO) technology is applied. At 2 V supply and gate length of 0.5 μm, the thin-film transistors (TFTs) yield a measured transit frequency of 138 MHz. Our scalable TFT compact simulation model shows good agreement with measurements. To achieve a sufficiently high yield, TFTs with gate lengths of around 5 μm are used for the circuit design. A Cherry Hopper amplifier with 3.5 MHz bandwidth, 10 dB gain and 5 mW dc power is presented. The fully integrated receiver covering a plastic foil area of 3 × 9 mm2 includes a four stage cascode amplifier, an amplitude detector, a baseband amplifier and a filter. At a dc current of 7.2 mA and a supply of 5 V, a bandwidth of 2 - 20 MHz and a gain beyond 15 dB were measured. Finally, an outlook regarding future advancements of high frequency electronics on plastic is given

Flexible, Photopatterned, Colloidal Cdse Semiconductor Nanocrystal Integrated Circuits

As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting “inks” into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with ~7 kHz bandwidths, ring oscillators with \u3c10 µs stage delays, and NAND and NOR logic gates. In order to produce higher performance and more consistent transistors, we develop a new hybrid procedure for processing the CdSe nanocrystals. This procedure produces transistors with repeatable performance exceeding 40 cm2/Vs when fabricated on silicon wafers and 16 cm2/vs when fabricated as part of photopatterned integrated circuits on Kapton substrates. In order to demonstrate the full potential of these transistors, methods to create high-frequency oscillators were developed. These methods allow for transistors to operate at higher voltages as well as provide a means for wirebonding to the Kapton substrate, both of which are required for operating and probing high-frequency oscillators. Simulations of this system show the potential for operation at MHz frequencies. Demonstration of these transistors in this frequency range would open the door for development of CdSe integrated circuits for high-performance sensor, display, and audio applications. To develop further applications of electronics on flexible substrates, procedures are developed for the integration of polychromatic displays on polyethylene terephthalate (PET) substrates and a commercial near field communication (NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging

Flexible Electronics Based on Solution Processable Organic Semiconductors and Colloidal Semiconductor Nanocrystals

Solution-processable semiconductors hold great potential for the large-area, low-cost fabrication of flexible electronics. Recent advances in flexible electronics have introduced new functional devices such as light-weight displays and conformal sensors. However, key challenges remain to develop flexible devices from emerging materials that use simple fabrication processes and have high-performance. In this thesis, we first use a solution-processable organic semiconductor to build field-effect transistors on large-area plastic with mobility of 0.1 cm^2/Vs. Combined with passive components, we are able to build voltage amplifiers to capture few mV amplitude bio-signals. This work provides a proof of concept on applying solution processable materials in flexible circuits. In the second part of the thesis, we introduce colloidal CdSe nanocrystals (NCs) as solution-processable inks of semiconductor thin film devices. By strongly coupling and doping the CdSe NC thin films, we demonstrate high-performance, flexible nanocrystal field-effect transistors (NC-FETs) with mobility greater than 20 cm^2/Vs under 2V supply. Using these NC-FETs as building blocks, we demonstrate the first flexible nanocrystal integrated circuits (NCICs) with switching speed of 600 µsec. To design reliable integrated circuits with low-noise, we characterize the flicker noise amplitude and origin. We find the figure of merit for noise, the Hooge parameter, to be 3 x 10^-2 for CdSe NC-FETs, comparable to other emerging solution processable organic semiconductors and promising for low-noise circuit applications.As most of NCs are reactive and their devices tend to degrade in air, we develop processes that allow manipulation of the NCs in ambient atmosphere without compromising device performance. These processes open up opportunities for NC-based devices to be fabricated over large area using photolithography. By scaling the devices and reducing device parasitics, we are able to fabricate hundreds of NC-FETs on wafer-scale substrates and integrate them as circuits. We demonstrate voltage amplifiers with bandwidths of a few kHz and ring-oscillators with a stage delay of 3 µsec. We also show functional NCICs NOR and NAND logic. This thesis demonstrates the use of colloidal NCs to realize flexible, large-area circuits and the feasibility of more advanced analog and digital NCICs built on flexible substrates for various applications

Electronic Nanodevices

The start of high-volume production of field-effect transistors with a feature size below 100 nm at the end of the 20th century signaled the transition from microelectronics to nanoelectronics. Since then, downscaling in the semiconductor industry has continued until the recent development of sub-10 nm technologies. The new phenomena and issues as well as the technological challenges of the fabrication and manipulation at the nanoscale have spurred an intense theoretical and experimental research activity. New device structures, operating principles, materials, and measurement techniques have emerged, and new approaches to electronic transport and device modeling have become necessary. Examples are the introduction of vertical MOSFETs in addition to the planar ones to enable the multi-gate approach as well as the development of new tunneling, high-electron mobility, and single-electron devices. The search for new materials such as nanowires, nanotubes, and 2D materials for the transistor channel, dielectrics, and interconnects has been part of the process. New electronic devices, often consisting of nanoscale heterojunctions, have been developed for light emission, transmission, and detection in optoelectronic and photonic systems, as well for new chemical, biological, and environmental sensors. This Special Issue focuses on the design, fabrication, modeling, and demonstration of nanodevices for electronic, optoelectronic, and sensing applications

The 2021 flexible and printed electronics roadmap

This roadmap includes the perspectives and visions of leading researchers in the key areas of flexible and printable electronics. The covered topics are broadly organized by the device technologies (sections 1–9), fabrication techniques (sections 10–12), and design and modeling approaches (sections 13 and 14) essential to the future development of new applications leveraging flexible electronics (FE). The interdisciplinary nature of this field involves everything from fundamental scientific discoveries to engineering challenges; from design and synthesis of new materials via novel device design to modelling and digital manufacturing of integrated systems. As such, this roadmap aims to serve as a resource on the current status and future challenges in the areas covered by the roadmap and to highlight the breadth and wide-ranging opportunities made available by FE technologies

Modeling Of Two Dimensional Graphene And Non-graphene Material Based Tunnel Field Effect Transistors For Integrated Circuit Design

The Moore’s law of scaling of metal oxide semiconductor field effect transistor (MOSFET) had been a driving force toward the unprecedented advancement in development of integrated circuit over the last five decades. As the technology scales down to 7 nm node and below following the Moore’s law, conventional MOSFETs are becoming more vulnerable to extremely high off-state leakage current exhibiting a tremendous amount of standby power dissipation. Moreover, the fundamental physical limit of MOSFET of 60 mV/decade subthreshold slope exacerbates the situation further requiring current transport mechanism other than drift and diffusion for the operation of transistors. One way to limit such unrestrained amount of power dissipation is to explore novel materials with superior thermal and electrical properties compared to traditional bulk materials. On the other hand, energy efficient steep subthreshold slope devices are the other possible alternatives to conventional MOSFET based on emerging novel materials. This dissertation addresses the potential of both advanced materials and devices for development of next generation energy efficient integrated circuits. Among the different steep subthreshold slope devices, tunnel field effect transistor (TFET) has been considered as a promising candidate after MOSFET. A superior gate control on source-channel band-to-band tunneling providing subthreshold slopes well below than 60 mV/decade. With the emergence of atomically thin two-dimensional (2D) materials, interest in the design of TFET based on such novel 2D materials has also grown significantly. Graphene being the first and the most studied among 2D materials with exotic electronic and thermal properties. This dissertation primarily considers current transport modeling of graphene based tunnel devices from transport phenomena to energy efficient integrated circuit design. Three current transport models: semi-classical, semi-quantum and numerical simulations are described for the modeling of graphene nanoribbon tunnel field effect transistor (GNR TFET) where the semi-classical model is in close agreement with the quantum transport simulation. Moreover, the models produced are also extended for integrated circuit design using Verilog-A hardware description language for logic design. In order to overcome the challenges associated with the band gap engineering for making graphene transistor for logic operation, the promise of graphene based interlayer tunneling transistors are discussed along with their existing fundamental physical limitation of subthreshold slope. It has been found that such interlayer tunnel transistor has very poor electrostatic gate control on drain current. It gives subthreshold slope greater than the thermionic limit of 60 mV/decade at room temperature. In order to resolve such limitation of interlayer tunneling transistors, a new type of transistor named “junctionless tunnel effect transistor (JTET)” has been invented and modeled for the first time considering graphene-boron nitride (BN)-graphene and molybdenum disulfide (MoS2)-boron nitride (BN) heterostructures, where the interlayer tunneling mechanism controls the source-drain ballistic transport instead of depleting carriers in the channel. Steep subthreshold slope, low power and high frequency THz operation are few of the promising features studied for such graphene and MoS2 JTETs. From current transport modeling to energy efficient integrated circuit design using Verilog-A has been carried out for these new devices as well. Thus, findings in this dissertation would suggest the exciting opportunity of a new class of next generation energy efficient material based transistors as switches