DFT and BIST of a multichip module for high-energy physics experiments

Engineers at Politecnico di Torino designed a multichip module for high-energy physics experiments conducted on the Large Hadron Collider. An array of these MCMs handles multichannel data acquisition and signal processing. Testing the MCM from board to die level required a combination of DFT strategie

Flux switching machine design for high-speed geared drives

Electrical machines capable of high-speed operation are key technology used in many modern applications, such as gas turbine electrical systems, high-speed fly-wheels, turbochargers, and computer numerical control (CNC) machines. The use of geared high-speed machines to replace low-speed high torque drives has not been adequately researched to-date. The rationale of this thesis is to investigate a candidate high speed machine, namely flux switching machines to be used together with new types of core material with mechanical gearing to deliver high-torque and low speeds. Modern developments in advanced material technology have produced new magnetic materials capable of dealing with high resulting in very low losses in high speed machines. However, such metals typically have low mechanical strength, and they are found to be brittle. In order to manufacture electromechanical device with such new materials, it has to be reinforced with a mechanically strong structure. The use of multiple types of magnetic materials referred as a MMLC has been proposed in this thesis for high-speed machine design. In this research, a generic method using magnetic equivalent circuit to model flux switching machines (FSMs) is investigated. Moreover modeling, based on machine dimensions for multiphase FSMs having any pole and slot number has been introduced. The air-gap permeance modeling to simplify the magnetic circuit calculation of FSMs was also investigated in this thesis. It is shown that the permeability of magnetic material can be adjusted with the use of MMLC material. Using this feature, the FSM mathematical model is used to show the impact on electromagnetic performance using MMLCs and is shown to be beneficial. In order the evaluate the weight benefits of using geared high speed FSMs, the planetary gear systems are studies and their design constraints have been identified. An abstract form of weight estimation for given torque and speed requirements has been developed and validated using commercially available planetary gear specifications. FSMs together with gear boxes have been considered and it is shown that significant weight savings can be achieved at higher diameter and at high speeds

Terrain Representation And Reasoning In Computer Generated Forces : A Survey Of Computer Generated Forces Systems And How They Represent And Reason About Terrain

Report on a survey of computer systems used to produce realistic or intelligent behavior by autonomous entities in simulation systems. In particular, it is concerned with the data structures used by computer generated forces systems to represent terrain and the algorithmic approaches used by those systems to reason about terrain

A Mathematical Unification of Geometric Crossovers Defined on Phenotype Space

Geometric crossover is a representation-independent definition of crossover based on the distance of the search space interpreted as a metric space. It generalizes the traditional crossover for binary strings and other important recombination operators for the most frequently used representations. Using a distance tailored to the problem at hand, the abstract definition of crossover can be used to design new problem specific crossovers that embed problem knowledge in the search. This paper is motivated by the fact that genotype-phenotype mapping can be theoretically interpreted using the concept of quotient space in mathematics. In this paper, we study a metric transformation, the quotient metric space, that gives rise to the notion of quotient geometric crossover. This turns out to be a very versatile notion. We give many example applications of the quotient geometric crossover

Built-In Self-Test (BIST) for Multi-Threshold NULL Convention Logic (MTNCL) Circuits

This dissertation proposes a Built-In Self-Test (BIST) hardware implementation for Multi-Threshold NULL Convention Logic (MTNCL) circuits. Two different methods are proposed: an area-optimized topology that requires minimal area overhead, and a test-performance-optimized topology that utilizes parallelism and internal hardware to reduce the overall test time through additional controllability points. Furthermore, an automated software flow is proposed to insert, simulate, and analyze an input MTNCL netlist to obtain a desired fault coverage, if possible, through iterative digital and fault simulations. The proposed automated flow is capable of producing both area-optimized and test-performance-optimized BIST circuits and scripts for digital and fault simulation using commercial software that may be utilized to manually verify or adjust further, if desired