521 research outputs found

    Carbon Nanotube Interconnect Modeling for Very Large Scale Integrated Circuits

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    In this research, we have studied and analyzed the physical and electrical properties of carbon nanotubes. Based on the reported models for current transport behavior in non-ballistic CNT-FETs, we have built a dynamic model for non-ballistic CNT-FETs. We have also extended the surface potential model of a non-ballistic CNT-FET to a ballistic CNT-FET and developed a current transport model for ballistic CNT-FETs. We have studied the current transport in metallic carbon nanotubes. By considering the electron-electron interactions, we have modified two-dimensional fluid model for electron transport to build a semi-classical one-dimensional fluid model to describe the electron transport in carbon nanotubes, which is regarded as one-dimensional system. Besides its accuracy compared with two-dimensional fluid model and LĂĽttinger liquid theory, one-dimensional fluid model is simple in mathematical modeling and easier to extend for electronic transport modeling of multi-walled carbon nanotubes and single-walled carbon nanotube bundles as interconnections. Based on our reported one-dimensional fluid model, we have calculated the parameters of the transmission line model for the interconnection wires made of single-walled carbon nanotube, multi-walled carbon nanotube and single-walled carbon nanotube bundle. The parameters calculated from these models show close agreements with experiments and other proposed models. We have also implemented these models to study carbon nanotube for on-chip wire inductors and it application in design of LC voltage-controlled oscillators. By using these CNT-FET models and CNT interconnects models, we have studied the behavior of CNT based integrated circuits, such as the inverter, ring oscillator, energy recovery logic; and faults in CNT based circuits

    High Frequency Generation from Carbon Nanotube Field Effect Transistors Used as Passive Mixers

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    The high mobilities, low capacitances (due to small sizes), and high current densities of carbon nanotube field-effect transistors (CNT FETs) make them valid candidates for high frequency applications. The high cost of high frequency measurement equipment has been the largest hurdle to observing CNT transistor behavior at frequencies above 50 GHz. One economic solution to this barrier is to use an external harmonic mixer to convert high frequency signals to lower frequencies where they can be detected by a standard spectrum analyzer. By using this detection method, a new regime of high frequency CNT FET behavior is available for study. In this dissertation, we describe the design and fabrication of CNT FETs on quartz substrates using aligned arrays of CNTs as the device channel. The nonlinear input voltage to output drain current behavior of the devices is explained and approximated to the first order by using a Taylor expansion. For the high frequency mixing experiments, two input voltages of different frequencies are sourced on the gate of the devices without any device biasing. The input frequencies are limited to 100 kHz to 40 GHz by the signal generators used. The nonlinearities of the fabricated CNT FETs cause the input frequencies to be mixed together, even in the absence of a source-drain bias (passive mixing). The device output is the drain current, which contains sum and difference products of the input frequencies. By using an external harmonic mixer in combination with a spectrum analyzer to measure the drain current, output frequencies from 75 to 110 GHz can be observed. Up to 11th order mixing products are detected, due to the low noise floor of the spectrum analyzer. Control devices are also measured in the same experimental setup to ensure that the measured output signals are generated by the CNTs. The cutoff frequencies from previous passive mixing experiments predict that our devices should stop operating near 13 GHz, however our measurement setup extends and overcomes these cutoffs, and the generation of high frequency output signals is directly observed up to 110 GHz. This is the highest output frequency observed in CNT devices to date

    Variability and reliability analysis of carbon nanotube technology in the presence of manufacturing imperfections

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    In 1925, Lilienfeld patented the basic principle of field effect transistor (FET). Thirty-four years later, Kahng and Atalla invented the MOSFET. Since that time, it has become the most widely used type of transistor in Integrated Circuits (ICs) and then the most important device in the electronics industry. Progress in the field for at least the last 40 years has followed an exponential behavior in accordance with MooreÂżs Law. That is, in order to achieve higher densities and performance at lower power consumption, MOS devices have been scaled down. But this aggressive scaling down of the physical dimensions of MOSFETs has required the introduction of a wide variety of innovative factors to ensure that they could still be properly manufactured. Transistors have expe- rienced an amazing journey in the last 10 years starting with strained channel CMOS transistors at 90nm, carrying on the introduction of the high-k/metal-gate silicon CMOS transistors at 45nm until the use of the multiple-gate transistor architectures at 22nm and at recently achieved 14nm technology node. But, what technology will be able to produce sub-10nm transistors? Different novel materials and devices are being investigated. As an extension and enhancement to current MOSFETs some promising devices are n-type III-V and p-type Germanium FETs, Nanowire and Tunnel FETs, Graphene FETs and Carbon Nanotube FETs. Also, non-conventional FETs and other charge-based information carrier devices and alternative information processing devices are being studied. This thesis is focused on carbon nanotube technology as a possible option for sub-10nm transistors. In recent years, carbon nanotubes (CNTs) have been attracting considerable attention in the field of nanotechnology. They are considered to be a promising substitute for silicon channel because of their small size, unusual geometry (1D structure), and extraordinary electronic properties, including excellent carrier mobility and quasi-ballistic transport. In the same way, carbon nanotube field-effect transistors (CNFETs) could be potential substitutes for MOSFETs. Ideal CNFETs (meaning all CNTs in the transistor behave as semiconductors, have the same diameter and doping level, and are aligned and well-positioned) are predicted to be 5x faster than silicon CMOS, while consuming the same power. However, nowadays CNFETs are also affected by manufacturing variability, and several significant challenges must be overcome before these benefits can be achieved. Certain CNFET manufacturing imperfections, such as CNT diameter and doping variations, mispositioned and misaligned CNTs, high metal-CNT contact resistance, the presence of metallic CNTs (m-CNTs), and CNT density variations, can affect CNFET performance and reliability and must be addressed. The main objective of this thesis is to analyze the impact of the current CNFET manufacturing challenges on multi-channel CNFET performance from the point of view of variability and reliability and at different levels, device and circuit level. Assuming that CNFETs are not ideal or non-homogeneous because of today CNFET manufacturing imperfections, we propose a methodology of analysis that based on a CNFET ideal compact model is able to simulate heterogeneous or non-ideal CNFETs; that is, transistors with different number of tubes that have different diameters, are not uniformly spaced, have different source/drain doping levels, and, most importantly, are made up not only of semiconducting CNTs but also metallic ones. This method will allow us to analyze how CNT-specific variations affect CNFET device characteristics and parameters and CNFET digital circuit performance. Furthermore, we also derive a CNFET failure model and propose an alternative technique based on fault-tolerant architectures to deal with the presence of m-CNTs, one of the main causes of failure in CNFET circuits

    Semi-analytical model for carbon nanotube and graphene nanoribbon transistors

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    Carbon nanotubes and graphene provide high carrier mobility for ballistic transport, high carrier velocity for fast switching, and excellent mechanical and thermal conductivity. As a result, they are widely considered as next generation candidate materials for nanoelectronics. In this thesis, I first propose a physics-based semi-analytical model for Schottky-barrier (SB) carbon nanotube (CNT) and graphene nanoribbon (GNR) transistors. The model reduces the computational complexity in the two critical but time-consuming steps, namely the calculation of the tunneling probability and the self-consistent evaluation of the surface potential in the transistor channel. Since SB-type CNT and GNR transistors exhibit ambipolar conduction that is not preferable in digital applications, I further propose a semi-analytical model for the double-gate transistor structure that is able to control the ambipolar conduction in-field. Future directions, including the modeling of new CNT and GNR devices and novel circuits based on the in-field controllability of ambipolar conduction, will also be described

    Modeling the properties of carbon nanotubes for sensor-based devices

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    We acknowledge funding from the European Community through NoE Nanoquanta (NMP4-CT-2004-500198), SANES (NMP4-T-2006-017310), DNA-NANODEVICES (IST-2006-029192) and NANO-ERA Chemistry projects, UPV/EHU (SGIker Arina) and the Basque Governement.Peer reviewe

    Nanoelectronic Design Based on a CNT Nano-Architecture

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