Energy Model of Networks-on-Chip and a Bus

A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both NoC architectures to predict their energy consumption per transported bit. Both architectures are also compared with a traditional bus architecture. The energy model is primarily needed to find a near optimal run-time mapping (from an energy point of view) of inter-process communication to NoC link

Analysis of adaptive algorithms for an integrated communication network

Techniques were examined that trade communication bandwidth for decreased transmission delays. When the network is lightly used, these schemes attempt to use additional network resources to decrease communication delays. As the network utilization rises, the schemes degrade gracefully, still providing service but with minimal use of the network. Because the schemes use a combination of circuit and packet switching, they should respond to variations in the types and amounts of network traffic. Also, a combination of circuit and packet switching to support the widely varying traffic demands imposed on an integrated network was investigated. The packet switched component is best suited to bursty traffic where some delays in delivery are acceptable. The circuit switched component is reserved for traffic that must meet real time constraints. Selected packet routing algorithms that might be used in an integrated network were simulated. An integrated traffic places widely varying workload demands on a network. Adaptive algorithms were identified, ones that respond to both the transient and evolutionary changes that arise in integrated networks. A new algorithm was developed, hybrid weighted routing, that adapts to workload changes

Performance evaluation of MPLS-enabled communications infrastructure for wide area monitoring systems

In order to obtain the transient power system measurement information, Wide Area Monitoring Systems (WAMS) should be able to collect Phasor Measurement Unit (PMU) data in a timely manner. Therefore along with the continual deployment of PMUs in Great Britain (GB) transmission system substations, a high performance communications infrastructure is becoming essential with regard to the establishment of reliable WAMS. This paper focuses mainly on evaluating the performance of the real-time WAMS communication infrastructure when Multi-Protocol Label Switching (MPLS) capability is added to a conventional IP network. Furthermore, PMU communications from geographically distributed substations to a Phasor Data Concentrator (PDC) are investigated over different transport protocols. Using OPNET Modeler, simulations are performed based on the existing WAMS infrastructure as installed on the GB transmission system. The simulation results are analyzed in detail in order to fully determine the different characteristics of communication delays between PMUs and PDC

A three-stage ATM switch with cell-level path allocation

A method is described for performing routing in three-stage asynchronous transfer mode (ATM) switches which feature multiple channels between the switch modules in adjacent stages. The method is suited to hardware implementation using parallelism to achieve a very short execution time. This allows cell-level routing to be performed, whereby routes are updated in each time slot. The algorithm allows a contention-free routing to be performed, so that buffering is not required in the intermediate stage. An algorithm with this property, which preserves the cell sequence, is referred to as a path allocation algorithm. A detailed description of the necessary hardware is presented. This hardware uses a novel circuit to count the number of cells requesting each output module, it allocates a path through the intermediate stage of the switch to each cell, and it generates a routing tag for each cell, indicating the path assigned to it. The method of routing tag assignment described employs a nonblocking copy network. The use of highly parallel hardware reduces the clock rate required of the circuitry, for a given-switch size. The performance of ATM switches using this path allocation algorithm has been evaluated by simulation, and is described

Zooming Into Radio Events by Bus Snooping

In this position paper, we advocate the use of bus snooping to trace radio events. Highly precise and unintrusive, the technique leads to potentially more efficient code and enables more insightful protocol analysis than conventional code instrumentation techniques

Power packet transferability via symbol propagation matrix

Power packet is a unit of electric power transferred by a power pulse with an information tag. In Shannon's information theory, messages are represented by symbol sequences in a digitized manner. Referring to this formulation, we define symbols in power packetization as a minimum unit of power transferred by a tagged pulse. Here, power is digitized and quantized. In this paper, we consider packetized power in networks for a finite duration, giving symbols and their energies to the networks. A network structure is defined using a graph whose nodes represent routers, sources, and destinations. First, we introduce symbol propagation matrix (SPM) in which symbols are transferred at links during unit times. Packetized power is described as a network flow in a spatio-temporal structure. Then, we study the problem of selecting an SPM in terms of transferability, that is, the possibility to represent given energies at sources and destinations during the finite duration. To select an SPM, we consider a network flow problem of packetized power. The problem is formulated as an M-convex submodular flow problem which is known as generalization of the minimum cost flow problem and solvable. Finally, through examples, we verify that this formulation provides reasonable packetized power.Comment: Submitted to Proceedings of the Royal Society A: Mathematical, Physical and Engineering Science