Development of an image converter of radical design

A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product

IC Ku-band Impatt Amplifier

High efficiency GaAs low-high-low IMPATTs were investigated. Theoretical analyses were employed to establish a design window for the material parameters to maximize microwave performance. Single mesa devices yielded typically 2 to 3 W with 16 to 23% efficiency in waveguide oscillator test circuits. IMPATTs with high reliability Pt/TiW/Pt/Au metallizations were subjected to temperature stress, non-rf bias-temperature stress, and rf bias-temperature stress. Assuming that temperature is the driving force behind the dominant failure mechanism, a mean-time-to-failure considerably greater than 500,000 hours is indicated by the stress tests. A 15 GHz, 4W, 56 dB gain microstrip amplifier was realized using GaAs FETs and IMPATTs. Power combining using a 3 db Lange coupler is employed in the power output stage having an intrinsic power-added efficiency of 15.7%. Overall dc-to-rf efficiency of the amplifier is 10.8%. The amplifier has greater than a 250 MHz, 1 db bandwidth; operates over the 0 deg to 50 C (base plate) temperature range with less than 0.5 db change in the power output; weighs 444 grams; and has a volume of 220 cu cm

Longwave and bi-color type-II InAs/(In)GaSb superlattice infrared detectors

Infrared (IR) photodetectors are useful for a variety of military and civil applications such as target acquisition, medical diagnostics, pollution monitoring, to name just a few. Presently photonic IR detectors are based on interband transitions in low bandgap semiconductors such as mercury cadmium telluride (MCT) or InSb or in intersubband transitions in hetero-engineered structures such as quantum well or quantum dot infrared photodetectors (QWIPs or QDIPs). These detectors operate at low temperatures (77 K-200 K) in order to obtain high signal to noise ratio. The cooling requirement limits the lifetime, increases the weight and the total cost, as well as the power budget, of the whole infrared system. There is a concerted effort to develop photonic detectors operating at higher temperatures. In the past few years, interband transitions in type II InAs/GaSb strain layer superlattices (SL)have emerged as a competing technology among other IR systems. Although MCT and QWIP technologies are relatively more mature than the SL technology, the SL technology has potential to enhance performance in several key areas. One of the main advantages of this system lies in the fact that the effective band gap of the SL can be tailored over a wide range (3 μm \u3c λc \u3c 30 μm) by varying the thickness of two mid bandgap\u27 constituent materials, namely GaSb and InAs. Tunneling currents in SL are reduced due to a larger electron effective mass. Large splitting between heavy-hole and light-hole valence subbands due to strain in the SLs contributes to the suppression of Auger recombination. Moreover, the band structure of the SL can be engineered to enhance carrier lifetimes and reduce noise at higher temperatures. SL based IR detectors have demonstrated high quantum efficiency, high temperature operation, and are suitable for incorporation in focal plane arrays (FPA) by tapping into the mature III-V based growth and fabrication processes. The recently proposed nBn heterostructure design has demonstrated a 100 K increase in background-limited infrared photodetection (BLIP) for InAs-based device, by decreasing Shockley-Read-Hall generation currents and by suppressing surface currents using specific processing. Third generation IR detectors have three main emphases, high operating temperature (HOT), multicolor capability, and large format arrays. This work concentrates on multicolor and HOT IR detectors based on nBn design. Contributions of this thesis include 1. Development of design and growth procedure for the long-wave (LW) SL detectors leading to an improved detector performance: 13 MLs of InAs and 7 MLs of GaSb with InSb strain compensating layer were designed and optimized for LW SL detectors. LWIR pin and nBn detectors were introduced and their optical and electrical properties were compared. LW nBn detectors show higher device performance in terms of lower dark current density and higher responsivity as compared to the LW pin detectors. The reduction in dark current in LW nBn detector is due to reduction of SRH centers as well as surface leakage currents. The increase in responsivity for LW nBn detectors is due to reduction non-radiative SRH recombination. 2. Design, growth and characterization of bi-color nBn detectors: Present day two color SL detectors require two contacts per pixel leading to a complicated processing scheme and expensive read out integrated circuits (ROICs). The nBn architecture was modified to realize a dual-band response by changing the polarity of applied bias using single contact processing. The spectral response shows a significant change in the LWIR to MWIR ratio within a very small bias range ( 3c100 mV ) making it compatible with commercially available ROICs. 3. Investigation of background carrier concentration in SLs: The electrical transport in SLs was investigated in order to improve the collection efficiency and understand SL devices performance operating at ambient temperature. For this purpose background carrier concentration of type-II InAs/GaSb SLs on GaAs substrates are studied. The hall measurements on mid-wave SLs revealed that the conduction in the MWIR SLs is dominated by holes at low temperatures (\u3c 200 K) and by electrons at high temperatures (\u3e 200 K) and is dominated by electrons at all temperatures for LWIR SLs possibly due to the thicker InAs (residually n-type) and thinner GaSb (residually p-type) layers. By studying the in-plane transport characteristics of LW SLs grown at different temperatures, it was shown that interface roughness scattering is the dominant scattering mechanism at higher temperatures (200 K- 300 K).\u2

Three Dimensional Integration (3DI) of semiconductor circuit layers: new devices and fabrication process

The device density of Integrated Circuits (ICs) manufactured by current VLSI technology is reaching it\u27s theoretical limit. Nevertheless, the demand for integration of more devices per chip is growing. To accommodate this need three main possibilities can be explored: Wafer Scale Integration (WSI), Ultra Large Scale Integration (ULSI), and Three Dimensional Integration (3DI). A brief review of these techniques along with their comparative advantages and disadvantages is presented. It has been concluded that 3DI technology is superior to others. Therefore, an attempt is made to develop a viable fabrication process for this technology. This is done by first reviewing the current technologies that are utilized for fabrication of Integrated Circuits (ICs) and their compatibility with 3DI stringent requirements.;Based on this review, a set of fabrication procedure for realization of 3DI technology, are presented in chapter 3. In Chapter 1 the compatibility of the currently used devices, such as BJTs and FETS, with 3DI technology is examined. Moreover, a new active device is developed for 3DI technology to replace BJTs and FETs in circuits. This new device is more compatible to the constrains of 3DI technology. Chapter 2 is devoted to solving the overall problems of 3DI circuits. The problem of heat and power dispassion and signal coupling (Cross-Talk) between the layers are reviewed, and an inter-layer shield is proposed to overcome these problems. The effectiveness of such a thin shield is considered theoretically. In Chapter 3 a fabrication process for 3DI technology is proposed. This is done after a short analysis of previous attempts in developing 3DI technologies.;Chapter 4 focuses on analog extension of 3DI technology. Moreover, in this chapter microwave 3DI circuits or 3DI MMIC is investigated. Practical considerations in choice of material for the proposed device is the subject of study in Chapter 5. Low temperature ohmic contact and utilization of metal-silicides for the proposed device are considered in this chapter. Finally in Chapter 6 various computer verifications for this work is presented, and in Chapter 7 experimental results to support this work is included

Methods of measurement for semiconductor materials, process control, and devices

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors

Compact Models for Integrated Circuit Design

This modern treatise on compact models for circuit computer-aided design (CAD) presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models. Featuring exercise problems at the end of each chapter and extensive references at the end of the book, the text supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices. It ensures even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts

TCAD Simulations and Characterization of High-Voltage Monolithic Active Pixel Sensors

High- Voltage Monolithic Active Pixel Sensors (HV-MAPS) have emerged as a promising technology for silicon tracking detectors in particle physics. HV-MAPS, selected as the foundational technology for the Mu3e Pixel Tracker and under investigation for potential implementation in future detector applications, presents unique design challenges due to its intricate structure and complex electric field distribution. This thesis presents the first comprehensive comparison of Technology Computer-Aided Design (TCAD) simulations and experimental measurements in HV-MAPS. The results show that the simulations correctly describe key experimental parameters like breakdown voltage and explain the loss of hit detection efficiency at the edges and corners of the pixels. The TCAD simulations provide insights into the behavior of the charge collection diode of MuPix8, ALTASPix, and MuPix10 prototypes, facilitating design optimizations. These studies primarily investigated the depletion zone, breakdown voltage and electric field distribution. Additionally, the characterization of MuPix10, using testbeam results, allows for the investigation of the efficiency and cluster size for different angles of incidence of the beam Furthermore, this research examines the impact of diffusion and drift on efficiency and cluster size for different voltage, resistivity, and thickness configurations. The findings of this investigation contribute to an enhanced understanding of HV-MAPS and their potential for developing more efficient and reliable silicon tracking detectors in particle physics experiments