Design and Testing of Electronic Devices for Harsh Environments

In this thesis an overview of the research activity focused on development, design and testing of electronic devices and systems for harsh environments has been reported. The scope of the work has been the design and validation flow of Integrated Circuits operating in two harsh applications: Automotive and High Energy Physics experiments. In order to fulfill the severe operating electrical and environmental conditions of automotive applications, a systematic methodology has been followed in the design of an innovative Intelligent Power Switch: several design solutions have been developed at architectural and circuital level, integrating on-chip selfdiagnostic capabilities and full protection against high voltage and reverse polarity, effects of wiring parasitics, over-current and over-temperature phenomena. Moreover current slope and soft start integrated techniques has ensured low EMI, making the Intelligent Power Switch also configurable to drive different interchangeable loads efficiently. The innovative device proposed has been implemented in a 0.35 μm HV-CMOS technology and embedded in mechatronic 3rd generation brush-holder regulator System-on-Chip for an automotive alternator. Electrical simulations and experimental characterization and testing at componentlevel and on-board system-level has proven that the proposed design allows for a compact and smart power switch realization, facing the harshest automotive conditions. The smart driver has been able to supply up to 1.5 A to various types of loads (e.g.: incadescent lamp bulbs, LED), in operating temperatures in the wide range -40 °C to 150 °C, with robustness against high voltage up to 55 V and reverse polarity up to -15 V. The second branch of research activity has been framed within the High Energy Physics area, leading to the development of a general purpose and flexible protocol for the data acquisition and the distribution of Timing, Trigger and Control signals and its implementation in radiation tolerant interfaces in CMOS 130 nm technology. The several features integrated in the protocol has made it suitable for different High Energy Physics experiments: flexibility w.r.t. bandwidth and latency requirements, robustness of critical information against radiation-induced errors, compatibility with different data types, flexibility w.r.t the architecture of the control and readout systems, are the key features of this novel protocol. Innovative radiation hardening techniques have been studied and implemented in the test-chip to ensure the proper functioning in operating environments with a high level of radiation, such as the Large Hadron Collider at CERN in Geneva. An FPGA-based emulator has been developed and, in a first phase, employed for functional validation of the protocol. In a second step, the emulator has been modified as test-bed to assess the Transmitter and Receiver interfaces embedded on the test-chip. An extensive phase of tests has proven the functioning of the interfaces at the three speed options, 4xF, 8xF and 16xF (F = reference clock frequency) in different configurations. Finally, irradiation tests has been performed at CERN X-rays irradiation facility, bearing out the proper behaviour of the interfaces up to 40 Mrad(SiO2)

High-Voltage Integrated Circuits design and validation for automotive applications

Electronic Integrated Circuits (ICs) are an important pillar of the automotive market, especially since legal and safety requirements have been introduced to manage vehicles emissions and behaviors. Furthermore, the harsh environment and the tight safety requirements, summed with the market that is pushing to reduce the development lead time and to increase the system complexity, require to develop dedicated ICs for the automotive applications. This thesis presents some peculiar high-power and high-voltage ICs for automotive applications that have been studied, designed and developed taking into account all the requirements that automotive grade ICs have to respect, with emphasis on performance, quality and safety aspects. Particularly the thesis reports the design and validation of power management blocks and output drivers for inductive loads, showing how to fulfill in an effective way the performance, quality and safety targets according to the guidelines and the constraints of the latest automotive standards, like ISO26262 and AEC-Q100. All the designed ICs has been simulated and manufactured, including layout drawings, in a 0.35um HV-CMOS technology from AMS. The effectiveness and robustness of the proposed circuits has been validated on silicon and corresponded measurement results has been reported

The Effects of Spread-Spectrum Techniques in Mitigating Conducted EMI to LED Luminance

Rapid voltage and current changes in recently ubiquitous LED driver have a potency to interfere other devices. Solutions with special converter design, component design, EMI filter, and spread-spectrum techniques have been proposed. Due to cost-size-weight constraints, spread-spectrum technique seems a potential candidate in alleviating EMI problem in LED application. In this paper, the effectiveness of conducted EMI suppression performance of the spread-spectrum technique is evaluated. Spread-spectrum techniques applied by giving disturbance to the system LED driver with 3 profile signals, filtered square, triangular, and sine disturbance signal to the switching pattern of a buck LED driver. From the test results, 472.5 kHz triangular and 525 kHz sine signal can reduce EMI about 42 dBuV whilethe filtered square signal can reduce EMI 40.70 dBuV compare with fundamental constantfrequency reference 669 kHz. The average reduction in the power level of the third signal inthe frequency range of 199 kHz to 925 kHz for 5.154281 dBuV and the filtered square signal can reduce the average power level better than other signal disturbance of 5.852618 dBuV.LED luminance decrease when the spread-spectrum technique is applied to the system about 2814 lux

An Experimental Study of Conducted EMI Mitigation on the LED Driver using Spread Spectrum Technique

LED driver has the potential to interfere the system of electronic devices if the voltage and current change rapidly.  Several previous studies presented various solutions to overcome this problem such as particular converter design, component design, electromagnetic interference (EMI) filters, and spread-spectrum techniques. Compared to other solutions, the spread-spectrum technique is the most potential way to reduce the EMI in LED applications due to its limited cost-size-weight. In this paper, the effectiveness of conducted EMI suppression performance and the evaluation of its effect on LED luminance using spread-spectrum techniques are investigated. Spread-spectrum is applied to the system by modifying the switching frequency by providing disturbances at pin IADJ. The disorder is given in the form of four signals, namely square, filtered-square, triangular, and sine disturbance signals. The highest level of the EMI suppression of about 31.89% is achieved when the LED driver is given 800 mVpp filtered-square waveform. The highest reduction power level occurs at fundamental frequency reference, when it is given 700 mVpp square disruption signal, is about 81.77% reduction. The LED luminance level will reduce by 85.2% when it is given the four waveforms disruption signals.  These reductions occur as the switching frequency of the LED driver does not work on a fixed frequency, but it varies in certain bands. LED brightness level has a tendency to generate a constant value of 235 lux when it is given the disruption signals. This disturbance signal causes the dimming function on the system that does not work properly

Methodology to Improve Switching Speed of SiC MOSFETs in Hard Switching Applications

To meet the higher efficiency and power density requirement for power converters, the switching speed of power devices is preferred to increase. Thanks to silicon carbide (SiC) power MOSFETs, their intrinsic superior switching characteristics compared with silicon IGBTs makes it possible to run converters at faster switching speed in hard switching applications. Nevertheless, the switching speed is not only dependent on the device’s characteristics, but also strongly related to the circuit like gate drive and parasitics. To fully utilize the potential of SiC MOSFETs, the impact factors limiting the switching speed are required to be understood. Specific solutions and methods need to be developed to mitigate the influence from these impact factors.The characterization of the switching speed for SiC MOSFETs with different current ratings is conducted with double pulse test (DPT) first. Based on the result, the impact factors of switching speed are evaluated in detail.According to the evaluation, the switching speed of SiC discrete devices with low current rating is mainly limited by the gate drive capability. A current source gate drive as well as a charge pump gate drive are proposed, which can provide higher current during the switching transient regardless of the low transconductance and large internal gate resistance of SiC discrete devices.For SiC power modules with high current rating, the switching speed is mainly determined by the device drain-source overvoltage resulting from circuit parasitics. An analytical model for the multiple switching loops related overvoltage in 3L-ANPC converters is established. A simple modulation is developed to mitigate the effect of the non-linear device output capacitance, which helps reduce the overvoltage and enables higher switching speed operation of SiC power modules.Furthermore, the layout design methodology for three-level converters concerning the multiple commutation loops is introduced. The development of a laminated busbar for a 500 kVA 3L-ANPC converter with SiC power modules is presented in detail.Finally, a SiC based 1 MW inverter is built and tested to operate at cryogenic temperature. The proposed control and busbar above are utilized to increase the switching speed of the SiC power module

Improved methodology for conducted EMI assessment of power electronics and line impedance measurement

Electromagnetic Interference (EMI), primarily common mode (CM), is problematic in a wide range of electronic circuits due to its propensity to radiate, particularly in high power applications. It is routine for much effort and resources to be dedicated to its characterization and reduction as EMI compliance is a requirement for most electronic systems and devices, including power electronics. Many well-known factors contribute to a system’s EMI performance including intentional coupling from system components as well as unintentional coupling from parasitics. Sources of intentional coupling may include Y-capacitors intended to mitigate EMI as part of a filter. Unintentional coupling is more elusive and can exist throughout the system in PCB layout, cabling, load construction, and internal to components such as inverter bridges. Lesser-known contributions to EMI performance irregularities can be EMI filter asymmetries, switching asymmetries, line impedance variances, and galvanic coupling from the metrology intended to measure EMI. It is critical to understand these contributors to facilitate designs with optimal EMI performance. EMI filters are often added to designs with no consideration to asymmetries in construction and component tolerances. This proposal evaluates the impact to CM currents in cases of coupling or leakage inductance imbalances of a CM choke. Similarly, CM currents are also evaluated for cases when EMI filter Y-capacitor imbalances span the components tolerance band. Also analyzed are switching asymmetries in a typical converter topology to understand EMI impact and evaluate potential benefits if intentional asymmetric switching is applied. A practical method is introduced to measure line impedance upstream of devices under test as line impedance variation can impact the performance of EMI filter design. However, few documented practices exist to measure line impedance without specialized instrumentation. Finally, this work proposes a streamlined method for conducted emissions evaluation employing an oscilloscope, differential voltage probes, and post-processing software implemented in MATLAB. This method eliminates unintended metrology ground coupling that can significantly impact EMI measurements and minimizes risk of instrumentation damage particularly in high power systems

High performance readout circuits and devices for Lorentz force resonant CMOS-MEMS magnetic sensors

In the last decades, sensing capabilities of martphones have greatly improved since the early mobile phones of the 90’s. Moreover, wearables and the automotive industry require increasing electronics and sensing sophistication. In such echnological advance, Micro Electro Mechanical Systems (MEMS) have played an important role as accelerometers and gyroscopes were the first sensors based on MEMS technology massively introduced in the market. In contrast, it still does not exist a commercial MEMS-based compass, even though Lorentz force MEMS magnetometers were first proposed in the late 90’s. Currently, Lorentz force MEMS magnetometers have been under the spotlight as they can offer an integrated solution to nowadays sensing power. As a consequence, great advances have been achieved, but various bottlenecks limit the introduction of Lorentz force MEMS compasses in the market. First, current MEMS magnetometers require high current consumption and high biasing voltages to achieve good sensitivities. Moreover, even though devices with excellent performance and sophistication are found in the literature, there is still a lack of research on the readout electronic circuits, specially in the digital signal processing, and closed loop control. Second, most research outcomes rely on custom MEMS fabrication rocesses to manufacture the devices. This is the same approach followed in current commercial MEMS, but it requires different fabrication processes for the electronics and the MEMS. As a consequence, manufacturing cost is high and sensor performance is affected by the MEMS-electronics interface parasitics. This dissertation presents potential solutions to these issues in order to pave the road to the commercialization of Lorentz force MEMS compasses. First, a complete closed loop, digitally controlled readout system is proposed. The readout circuitry, implemented with off-the-shelf commercial components, and the digital control, on an FPGA, are proposed as a proof of concept of the feasibility, and potential benefits, of such architecture. The proposed system has a measured noise of 550 nT / vHz while the MEMS is biased with 300 µA rms and V = 1 V . Second, various CMOS-MEMS magnetometers have been designed using the BEOL part of the TSMC and SMIC 180 nm standard CMOS processes, and wet and vapor etched. The devices measurement and characterisation is used to analyse the benefits and drawbacks of each design as well as releasing process. Doing so, a high volume manufacturing viability can be performed. Yield values as high as 86% have been obtained for one device manufactured in a SMIC 180 nm full wafer run, having a sensitivity of 2.82 fA/µT · mA and quality factor Q = 7.29 at ambient pressure. While a device manufactured in TSMC 180 nm has Q = 634.5 and a sensitivity of 20.26 fA/µT ·mA at 1 mbar and V = 1 V. Finally, an integrated circuit has been designed that contains all the critical blocks to perform the MEMS signal readout. The MEMS and the electronics have been manufactured using the same die area and standard TSMC 180 nm process in order to reduce parasitics and improve noise and current consumption. Simulations show that a resolution of 8.23 µT /mA for V = 1 V and BW = 10 Hz can be achieved with the designed device.En les últimes dècades, tenint en compte els primers telèfons mòbils dels anys 90, les capacitats de sensat dels telèfons intel·ligents han millorat notablement. A més, la indústria automobilística i de wearables necessiten cada cop més sofisticació en el sensat. Els Micro Electro Mechanical Systems (MEMS) han tingut un paper molt important en aquest avenç tecnològic, ja que acceleròmetres i giroscopis varen ser els primers sensors basats en la tecnologia MEMS en ser introduïts massivament al mercat. En canvi, encara no existeix en la indústria una brúixola electrònica basada en la tecnologia MEMS, tot i que els magnetòmetres MEMS varen ser proposats per primera vegada a finals dels anys 90. Actualment, els magnetòmetres MEMS basats en la força de Lorentz són el centre d'atenció donat que poden oferir una solució integrada a les capacitats de sensat actuals. Com a conseqüència, s'han aconseguit grans avenços encara que existeixen diversos colls d'ampolla que encara limiten la introducció al mercat de brúixoles electròniques MEMS basades en la força de Lorentz. Per una banda, els agnetòmetres MEMS actuals necessiten un consum de corrent i un voltatge de polarització elevats per aconseguir una bona sensibilitat. A més, tot i que a la literatura hi podem trobar dispositius amb rendiments i sofisticació excel·lents, encara existeix una manca de recerca en el circuit de condicionament, especialment de processat digital i control del llaç. Per altra banda, moltes publicacions depenen de processos de fabricació de MEMS fets a mida per fabricar els dispositius. Aquesta és la mateixa aproximació que s'utilitza actualment en la indústria dels MEMS, però té l'inconvenient que requereix processos de fabricació diferents pels MEMS i l’electrònica. Per tant, el cost de fabricació és alt i el rendiment del sensor queda afectat pels paràsits en la interfície entre els MEMS i l'electrònica. Aquesta tesi presenta solucions potencials a aquests problemes amb l'objectiu d'aplanar el camí a la comercialització de brúixoles electròniques MEMS basades en la força de Lorentz. En primer lloc, es proposa un circuit de condicionament complet en llaç tancat controlat digitalment. Aquest s'ha implementat amb components comercials, mentre que el control digital del llaç s'ha implementat en una FPGA, tot com una prova de concepte de la viabilitat i beneficis potencials que representa l'arquitectura proposada. El sistema presenta un soroll de 550 nT / vHz quan el MEMS està polaritzat amb 300 µArms i V = 1 V . En segon lloc, s'han dissenyat varis magnetòmetres CMOS-MEMS utilitzant la part BEOL dels processos CMOS estàndard de TSMC i SMIC 180 nm, que després s'han alliberat amb líquid i gas. La mesura i caracterització dels dispositius s’ha utilitzat per analitzar els beneficis i inconvenients de cada disseny i procés d’alliberament. D'aquesta manera, s'ha pogut realitzar un anàlisi de la viabilitat de la seva fabricació en massa. S'han obtingut valors de yield de fins al 86% per un dispositiu fabricat amb SMIC 180 nm en una oblia completa, amb una sensibilitat de 2.82 fA/µT · mA i un factor de qualitat Q = 7.29 a pressió ambient. Per altra banda, el dispositiu fabricat amb TSMC 180 nm presenta una Q = 634.5 i una sensibilitat de 20.26 fA/µT · mA a 1 mbar amb V = 1 V. Finalment, s'ha dissenyat un circuit integrat que conté tots els blocs per a realitzar el condicionament de senyal del MEMS. El MEMS i l'electrònica s'han fabricat en el mateix dau amb el procés estàndard de TSMC 180 nm per tal de reduir paràsits i millorar el soroll i el consum de corrent. Les simulacions mostren una resolució de 8.23 µT /mA amb V = 1 V i BW = 10 Hz pel dispositiu dissenyat

Resonant Behaviour of Pulse Generators for the Efficient Drive of Optical Radiation Sources Based on Dielectric Barrier Discharges

Dielectric barrier discharge (DBD) excimer lamps emit vacuum-UV optical radiation. This work presents novel methods for efficiently operating DBDs with short, high-voltage pulses. Transformer-less systems utilising SiC power semiconductor switches are presented. Pulse frequencies of up to 3.1 MHz and peak inverter efficiencies of 92 % were achieved. The work encloses both mathematical backgrounds of pulsed resonant circuits and practical implementation of low-inductive power stages

Fuel Cell Distributed Generation: Power Conditioning, Control and Energy Management

Distributed generation is expected to play a significant role in remedying the many shortcomings in today’s energy market. In particular, fuel cell power generation will play a big part due to several advantages. Still, it is faced with its own challenges to tap into its potential as a solution to the crisis. The responsibilities of the Power Conditioning Unit (PCU), and thus its design, are therefore complex, yet critical to the fuel cell system’s performance and ability to meet the requirements. To this end, the dc-dc converter, considered the most critical component of the PCU for optimum performance, is closely examined. The selected converter is first modeled to gain insight into its behavior for the purpose of designing suitable compensators. MATLAB is then used to study the results using the frequency domain, and it was observed that the converter offers its own unique challenges in terms of closed-loop performance and stability. These limitations must therefore be carefully accounted for and compensated against when designing the control loops to achieve the desired objectives. Negative feedback control to ensure robustness is then discussed. The insertion of a second inner loop in Current Mode Control (CMC) offers several key advantages over single-loop Voltage Mode Control (VMC). Furthermore, the insertion of a Current Error Amplifier (CEA) in Average Current Mode Control (ACMC) helps overcome many of the problems present in Peak Current Mode Control (PCMC) whilst allowing much needed design flexibility. It is therefore well suited for this application in an attempt to improve the dynamic behavior and overcoming the shortcomings inherent in the converter. The modulator and controller for ACMC are then modeled separately and combined with the converter’s model previously derived to form the complete small-signal model. A suitable compensation network is selected based on the models and corresponding Bode plots used to assess the system’s performance and stability. The resulting Bode plot for the complete system verifies that the design objectives are clearly met. The complete system was also built in MATLAB/Simulink, and subjected to external disturbances in the form of stepped load changes. The results confirm the system’s excellent behavior despite the disturbance, and the effectiveness of the control strategy in conjunction with the derived models. To meet the demand in many applications for power sources with high energy density and high power density, it is constructive to combine the fuel cell with an Energy Storage System (ESS). The hybrid system results in a synergistic system that brings about numerous potential advantages. Nevertheless, in order to reap these potential benefits and avoid detrimental effects to the components, a suitable configuration and control strategy to regulate the power flow amongst the various sources is of utmost importance. A robust and flexible control strategy that allows direct implementation of the ACMC scheme is devised. The excellent performance and versatility of the proposed system and control strategy are once again verified using simulations. Finally, experimental tests are also conducted to validate the results presented in the dissertation. A scalable and modular test station is built that allows an efficient and effective design and testing process of the research. The results show good correspondence and performance of the models and control design derived throughout the thesis

The Design, Building, and Testing of a Constant on Discreet Jammer for the Ieee 802.15.4/ZIGBEE Wireless Communication Protocol

As wireless protocols become easier to implement, more products come with wireless connectivity. This latest push for wireless connectivity has left a gap in the development of the security and the reliability of some protocols. These wireless protocols can be used in the growing field of IoT where wireless sensors are used to share information throughout a network. IoT is being implemented in homes, agriculture, manufactory, and in the medical field. Disrupting a wireless device from proper communication could potentially result in production loss, security issues, and bodily harm. The 802.15.4/ZigBee protocol is used in low power, low data rate, and low cost wireless applications such as medical devices and home automation devices. This protocol uses CSMA-CA (Carrier Sense Multiple Access w/ Collision Avoidance) which allows for multiple ZigBee devices to transmit simultaneousness and allows for wireless coexistence with the existing protocols at the same frequency band. The CSMA-CA MAC layer seems to introduce an unintentional gap in the reliability of the protocol. By creating a 16-tone signal with center frequencies located in the center of the multiple access channels, all channels will appear to be in use and the ZigBee device will be unable to transmit data. The jamming device will be created using the following hardware implementation. An FPGA connected to a high-speed Digital to Analog Converter will be used to create a digital signal synthesizer device that will create the 16-tone signal. The 16-tone signal will then be mixed up to the 2.4 GHz band, amplified, and radiated using a 2.4 GHz up-converter device. The transmitted jamming signal will cause the ZigBee MAC layer to wait indefinitely for the channel to clear. Since the channel will not clear, the MAC layer will not allow any transmission and the ZigBee devices will not communicate