Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications

Im Rahmen der vorliegenden Dissertation zum Thema „Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications“ wurde auf Basis einer 130 nm SiGe BiCMOS Technologie ein Through-Silicon Via (TSV) Technologiemodul zur Herstellung elektrischer Durchkontaktierungen für die Anwendung im Millimeterwellen und Sub-THz Frequenzbereich entwickelt. TSVs wurden mittels elektromagnetischer Simulationen modelliert und in Bezug auf ihre elektrischen Eigenschaften bis in den sub-THz Bereich bis zu 300 GHz optimiert. Es wurden die Wechselwirkungen zwischen Modellierung, Fertigungstechnologie und den elektrischen Eigenschaften untersucht. Besonderes Augenmerk wurde auf die technologischen Einflussfaktoren gelegt. Daraus schlussfolgernd wurde das TSV Technologiemodul entwickelt und in eine SiGe BiCMOS Technologie integriert. Hierzu wurde eine Via-Middle Integration gewählt, welche eine Freilegung der TSVs von der Wafer Rückseite erfordert. Durch die geringe Waferdicke von ca. 75 μm wird einen Carrier Wafer Handling Prozess verwendet. Dieser Prozess wurde unter der Randbedingung entwickelt, dass eine nachfolgende Bearbeitung der Wafer innerhalb der BiCMOS Pilotlinie erfolgen kann. Die Rückseitenbearbeitung zielt darauf ab, einen Redistribution Layer auf der Rückseite der BiCMOS Wafer zu realisieren. Hierzu wurde ein Prozess entwickelt, um gleichzeitig verschiedene TSV Strukturen mit variablen Geometrien zu realisieren und damit eine hohe TSV Design Flexibilität zu gewährleisten. Die TSV Strukturen wurden von DC bis über 300 GHz charakterisiert und die elektrischen Eigenschaften extrahiert. Dabei wurde gezeigt, dass TSV Verbindungen mit sehr geringer Dämpfung <1 dB bis 300 GHz realisierbar sind und somit ausgezeichnete Hochfrequenzeigenschaften aufweisen. Zuletzt wurden vielfältige Anwendungen wie das Grounding von Hochfrequenzschaltkreisen, Interposer mit Waveguides und 300 GHz Antennen dargestellt. Das Potential für Millimeterwellen Packaging und 3D Integration wurde evaluiert. TSV Technologien sind heutzutage in vielen Anwendungen z.B. im Bereich der Systemintegration von Digitalschaltkreisen und der Spannungsversorgung von integrierten Schaltkreisen etabliert. Im Rahmen dieser Arbeit wurde der Einsatz von TSVs für Millimeterwellen und dem sub-THz Frequenzbereich untersucht und die Anwendung für den sub-THz Bereich bis 300 GHz demonstriert. Dadurch werden neue Möglichkeiten der Systemintegration und des Packaging von Höchstfrequenzsystemen geschaffen.:Bibliographische Beschreibung List of symbols and abbreviations Acknowledgement 1. Introduction 2. FEM Modeling of BiCMOS & Interposer Through-Silicon Vias 3. Fabrication of BiCMOS & Silicon Interposer with TSVs 4. Characterization of BiCMOS Embedded Through-Silicon Vias 5. Applications 6. Conclusion and Future Work 7. Appendix 8. Publications & Patents 9. Bibliography 10. List of Figures and Table

Localization and electrical characterization of interconnect open defects

A technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the line. The location as well as the resistive value of the open defect are derived from attenuation and phase shift measurements. The characteristic defect-free impedance of the line and its propagation constant are considered to be unknowns, and their values are also derived from the above measurements. In this way, the impact of process parameter variations on the proposed model is diminished. The experimental setup required to perform the characterization measurements and a simple graphical procedure to determine the defect and line parameters are presented. Experimental results show a good agreement between the predicted location of the open and its real location, found by optical beam induced resistance change inspection. Errors smaller than 2% of the total length of the line have been observed in the experiments.Postprint (published version

Near-field scanning microwave microscope for interline capacitance characterization of nanoelectronics interconnect

We have developed a noncontact method for measurement of the interline capacitance in Cu/low-k interconnect. It is based on a miniature test vehicle with net capacitance of a few femto-Farads formed by two 20-\mu m-long parallel wires (lines) with widths and spacings the same as those of the interconnect wires of interest. Each line is connected to a small test pad. The vehicle impedance is measured at 4 GHz by a near-field microwave probe with 10 \mu m probe size via capacitive coupling of the probe to the vehicle's test pads. Full 3D finite element modeling at 4 GHz confirms that the microwave radiation is concentrated between the two wires forming the vehicle. An analytical lumped element model and a short/open calibration approach have been proposed to extract the interline capacitance value from the measured data. We have validated the technique on several test vehicles made with copper and low-k dielectric on a 300 mm wafer. The vehicles interline spacing ranges from 0.09 to 1 \mu m and a copper line width is 0.15 \mu m. This is the first time a near-field scanning microwave microscope has been applied to measure the lumped element impedance of a test vehicle

Heterogeneous Integration on Silicon-Interconnect Fabric using fine-pitch interconnects (≤10 �m)

Today, the ever-growing data-bandwidth demand is pushing the boundaries of the traditional printed circuit board (PCB) based integration schemes. Moreover, with the apparent saturation of semiconductor scaling, commonly called Moore's law, system scaling warrants a paradigm shift in packaging technologies, assembly techniques, and integration methodologies. In this work, a superior alternative to PCBs called the Silicon-Interconnect Fabric (Si-IF) is investigated. The Si-IF is a silicon-based, package-less, fine-pitch, highly scalable, heterogeneous integration platform for wafer-scale systems. In this technology, unpackaged dielets are assembled on the Si-IF at small inter-dielet spacings (≤100 �m) using fine-pitch (≤10 �m) die-to-substrate interconnects. A novel assembly process using a solder-less direct metal-metal (gold-gold and copper-copper) thermal compression bonding was developed. Using this process, sub-10 �m pitch interconnects with a low specific contact resistance of ≤0.7 Ω-�m2 were successfully demonstrated. Because of the tightly packed Si-IF assembly, the communication links between the neighboring dies are short (≤500 �m) with low loss (≤2 dB), comparable to on-chip connections. Consequently, simple buffers can transfer data between dies using a Simple Universal Parallel intERface for chips (SuperCHIPS) at low latency (&lt;30 ps), low energy per bit (≤0.03 pJ/b), and high data-rates (up to 10 Gbps/link), corresponding to an aggregate bandwidth up to 8 Tbps/mm. The benefits of the SuperCHIPS protocol were experimentally demonstrated to provide 5-90X higher data-bandwidth, 8-30X lower latency, and 5-40X lower energy per bit compared to existing integration schemes. This dissertation addresses the assembly technology and communication protocols of the Si-IF technology

Improved micro-contact resistance model that considers material deformation, electron transport and thin film characteristics

This paper reports on an improved analytic model forpredicting micro-contact resistance needed for designing microelectro-mechanical systems (MEMS) switches. The originalmodel had two primary considerations: 1) contact materialdeformation (i.e. elastic, plastic, or elastic-plastic) and 2) effectivecontact area radius. The model also assumed that individual aspotswere close together and that their interactions weredependent on each other which led to using the single effective aspotcontact area model. This single effective area model wasused to determine specific electron transport regions (i.e. ballistic,quasi-ballistic, or diffusive) by comparing the effective radius andthe mean free path of an electron. Using this model required thatmicro-switch contact materials be deposited, during devicefabrication, with processes ensuring low surface roughness values(i.e. sputtered films). Sputtered thin film electric contacts,however, do not behave like bulk materials and the effects of thinfilm contacts and spreading resistance must be considered. Theimproved micro-contact resistance model accounts for the twoprimary considerations above, as well as, using thin film,sputtered, electric contact

Low-Dimensional Materials for Disruptive Microwave Antennas Design

This chapter is devoted to a complete analysis of remarkable electromagnetic properties of nanomaterials suitable for antenna design miniaturization. After a review of state of the art mesoscopic scale modeling tools and characterization techniques in microwave domain, new approaches based on wideband material parameters identification (complex permittivity and conductivity) will be described from impedance equivalence formulation achievement by de-embedding techniques applicable in integrated technology or in free space. A focus on performances of 1D materials such as vertically aligned multi-wall carbon nanotube (VA-MWCNT) bundles, from theory to technology, will be presented as a disruptive demonstration for defense and civil applications as in radar systems

III-nitride nanowire light-emitting diodes: design and characterization

III-nitride semiconductors have been intensively studied for optoelectronic devices, due to the superb advantages offered by this materials system. The direct energy bandgap III-nitride semiconductors can absorb or emit light efficiently over a broad spectrum, ranging from 0.65 eV (InN) to 6.4 eV (AlN), which encompasses from deep ultraviolet to near infrared spectrum. However, due to the lack of native substrates, conventional III-nitride planar heterostructures generally exhibit very high dislocation densities that severely limit the device performance and reliability. On the other hand, nanowire heterostructures can be grown on lattice mismatched substrates with drastically reduced dislocation densities, due to highly effective lateral stress relaxation. Nanowire light-emitting diodes (LEDs) with emission in the ultraviolet to visible wavelength range have recently been studied for applications in solid-state lighting, flat-panel displays, and solar-blind detectors. In this thesis, investigation of the systematic process flow of design and epitaxial growth of group III-nitride nanoscale heterostructures was done. Moreover, demonstration of phosphor-free nanowire white LEDs using InGaN/AlGaN nanowire heterostructures grown directly on Si(111) substrates by molecular beam epitaxy was made. Full-color emission across nearly the entire visible wavelength range was realized by controlling the In composition in the InGaN active region. Strong white-light emission was recorded for the unpackaged nanowire LEDs with an unprecedentedly high color rendering index of 98. Moreover, LEDs with the operating wavelengths in the ultraviolet (UV) spectra, with emission wavelength in the range of 280-320 nm (UV-B) or shorter wavelength hold tremendous promise for applications in phototherapy, skin treatments, high speed dissociation and high density optical recording. Current planar AlGaN based UV-B LEDs have relatively low quantum efficiency due to their high dislocation density resulted from the large lattice mismatch between the AlGaN and suitable substrates. In this study, associated with the achievement of visible LEDs, the development of high brightness AlGaN/GaN nanowire UV-LEDs via careful design and device fabrication was shown. Strong photoluminescence spectra were recorded from these UV-B LEDs. The emission peak can be tunable from 290 nm to 320 nm by varying the Al content in AlGaN active region which can be done by optimizing the growth condition including Al/Ga flux ratio and also the growth temperature. Such visible to UV-B nanowire LEDs are ideally suited for future smart lighting, full-color display, phototherapy and skin treatments applications

DEVELOPMENT OF ION-MOBILITY AND MASS SPECTROMETRY FOR PROBING THE REACTIVITY OF NANOPARTICLES AND NANOCOMPOSITES

Aerosols of diameter smaller than 100 nm, usually are referred as nanoparticles or ultrafines, have received considerable interests lately as a source of building blocks to novel materials. However, our capabilities for charactering these materials are greatly limited by lack of appropriate diagnostic tools. The objective of this work is to develop new aerosol-based techniques for the characterization of nanoparticles and nanocomposites. The scope of this dissertation can be categorized in two ways. First, to provide knowledge of just how reactive a material is, we develop particle ion-mobility spectrometry and Single Particle Mass Spectrometry methods to probe the intrinsic size-dependent reactivity of individual metal particles. And second, the development of a new Time-of-Flight mass spectrometer (TOFMS) combined with a temperature jump (T-Jump) technique to study particle-particle reaction, and probe the reactivity of nanocomposite materials under combustion-like condition

Heterogeneous 2.5D integration on through silicon interposer

© 2015 AIP Publishing LLC. Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity

Carbon Nanotube Interconnect Modeling for Very Large Scale Integrated Circuits

In this research, we have studied and analyzed the physical and electrical properties of carbon nanotubes. Based on the reported models for current transport behavior in non-ballistic CNT-FETs, we have built a dynamic model for non-ballistic CNT-FETs. We have also extended the surface potential model of a non-ballistic CNT-FET to a ballistic CNT-FET and developed a current transport model for ballistic CNT-FETs. We have studied the current transport in metallic carbon nanotubes. By considering the electron-electron interactions, we have modified two-dimensional fluid model for electron transport to build a semi-classical one-dimensional fluid model to describe the electron transport in carbon nanotubes, which is regarded as one-dimensional system. Besides its accuracy compared with two-dimensional fluid model and Lüttinger liquid theory, one-dimensional fluid model is simple in mathematical modeling and easier to extend for electronic transport modeling of multi-walled carbon nanotubes and single-walled carbon nanotube bundles as interconnections. Based on our reported one-dimensional fluid model, we have calculated the parameters of the transmission line model for the interconnection wires made of single-walled carbon nanotube, multi-walled carbon nanotube and single-walled carbon nanotube bundle. The parameters calculated from these models show close agreements with experiments and other proposed models. We have also implemented these models to study carbon nanotube for on-chip wire inductors and it application in design of LC voltage-controlled oscillators. By using these CNT-FET models and CNT interconnects models, we have studied the behavior of CNT based integrated circuits, such as the inverter, ring oscillator, energy recovery logic; and faults in CNT based circuits