Bond graph modeling for the simulation of an electromechanical chain

In complex multi-physic systems such as electromechanical chains, it is necessary to establish clear and simple simulation models. This need is linked to the increase of hardware in the loop (HIL) development processes. Indeed, this way of design complex systems allows to reduce development costs. However, HIL development efficiency is linked to the accuracy of models. Consequently, complex systems must be modeled using a comprehensive approach such as bond graphs leading to equations easily implementable on simulators. This paper proposes a model of a whole electromechanical chain including some nonlinearities of parameters leading to an accurate representation of real systems

Micro combined heat and power management for a residential system

Fuel cell technology has reached commercialisation of fuel cells in application areas such as residential power systems, automobile engines and driving of industrial manufacturing processes. This thesis gives an overview of the current state of fuel cell-based technology research and development, introduces a μCHP system sizing strategy and proposes methods of improving on the implementation of residential fuel cell-based μCHP technology. The three methods of controlling residential μCHP systems discussed in this thesis project are heat-led, electricity-led and cost-minimizing control. Simulations of a typical HT PEMFC -based residential μCHP unit are conducted using these control strategies. A model of a residential μCHP system is formulated upon which these simulated tests are conducted. From these simulations, equations to model the costs of running a fuel-cell based μCHP system are proposed. Having developed equations to quantify the running costs of the proposed μCHP system a method for determining the ideal size of a μCHP system is developed. A sizing technique based on industrial CHP sizing practices is developed in which the running costs and capital costs of the residential μCHP system are utilised to determine the optimal size of the system. Residential thermal and electrical load profile data of a typical Danish household are used. Having simulated the system a practical implementation of the power electronics interface between the fuel cell and household grid is done. Two topologies are proposed for the power electronics interface a three-stage topology and a two-stage topology. The efficiencies of the overall systems of both topologies are determined. The system is connected to the grid so the output of each system is phase-shifted and DC injection, harmonic distortion, voltage range and frequency range are determined for both systems to determine compliance with grid standards. Deviations between simulated results and experimental results are recorded and discussed and relevant conclusions are drawn from these

Phase Noise Analyses and Measurements in the Hybrid Memristor-CMOS Phase-Locked Loop Design and Devices Beyond Bulk CMOS

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop. Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, loop filter, frequency divider, phase-frequency detector, and the auxiliary input reference clock. Similarly, a linear time-invariant model that has additive noise sources in frequency domain is used to analyze the phase noise. The modeled phase noise results are further compared with the corresponding phase-locked loop designs in different n-well CMOS processes. With the scaling of CMOS technology and the increase of the electrical field, the problem of short channel effects (SCE) has become dominant, which causes decay in subthreshold slope (SS) and positive and negative shifts in the threshold voltages of nMOS and pMOS transistors, respectively. Various devices are proposed to continue extending Moore\u27s law and the roadmap in semiconductor industry. We employed tunnel field effect transistor owing to its better performance in terms of SS, leakage current, power consumption etc. Applying an appropriate bias voltage to the gate-source region of TFET causes the valence band to align with the conduction band and injecting the charge carriers. Similarly, under reverse bias, the two bands are misaligned and there is no injection of carriers. We implemented graphene TFET and MoS2 in PLL design and the results show improvements in phase noise, jitter, tuning range, and frequency of operation. In addition, the power consumption is greatly reduced due to the low supply voltage of tunnel field effect transistor

Modeling and Control of Single Phase Grid-Tie Converters

The penetration of renewable energy into the electric utility grid is growing worldwide. At the heart of these renewable sources is the power electronic systems used to convert the renewable source to an output that can be connected to the grid. In recent years, there has been a great deal of work in designing converters for grid-tie applications and is continuing to grow. With recent smart grid activities, it is not likely that this work will cease in the short term. Most of the recent research is in ancillary services that the converter can offer in addition to the normal energy transfer. With more advanced converters, the ability to provide reactive power and harmonic compensation has triggered many researchers to look at more advanced control schemes. The work in this thesis focuses on modeling and control of single phase grid connected converters with an emphasis on grid interactions and ancillary services. While there has been a great deal of work in the modeling and control area for general converter operation, there has been little analysis in the converter’s response to grid disturbances. There are very few resources that discuss the controller design as it relates to power quality. However, these are issues that must be considered in a real design and what separates the research and commercial level converters. In addition to control and modeling work, the author suggests two new transformerless converter topologies for photovoltaic applications. In general, these converters can be viewed as a hybrid converter topology comprised of a two level and multi-level structure. Both converters show conducted emissions improvements over the standard commercial transformerless converters while also meeting leakage current requirements

Design of an RF CMOS Power Amplifier for Wireless Sensor Networks

The Power Amplifier (PA) is the last Radio Frequency (RF) building block in a transmitter, directly driving an antenna. The low power RF input signal of the PA is amplified to a significant power RF output signal by converting DC power into RF power. Since the PA consumes a majority of the power, efficiency plays one of the most important roles in a PA design. Designing an efficient, fully integrated RF PA that can operate at low supply voltage (1.2V), low power, and low RF frequency (433MHz) is a major challenge. The class E Power Amplifier, which is one type of switch mode PA, is preferred in such a scenario because of its higher theoretical efficiency compared to linear power amplifiers. A controllable class E RF power amplifier design implemented in 0.13 µm CMOS process is presented. The circuit was designed, simulated, laid out, fabricated, and tested. The PA will be integrated as a part of a complete wireless transceiver system using the same process

Reliability Assessment of IGBT through Modelling and Experimental Testing

Lifetime of power electronic devices, in particular those used for wind turbines, is short due to the generation of thermal stresses in their switching device e.g., IGBT particularly in the case of high switching frequency. This causes premature failure of the device leading to an unreliable performance in operation. Hence, appropriate thermal assessment and implementation of associated mitigation procedure are required to put in place in order to improve the reliability of the switching device. This paper presents two case studies to demonstrate the reliability assessment of IGBT. First, a new driving strategy for operating IGBT based power inverter module is proposed to mitigate wire-bond thermal stresses. The thermal stress is characterised using finite element modelling and validated by inverter operated under different wind speeds. High-speed thermal imaging camera and dSPACE system are used for real time measurements. Reliability of switching devices is determined based on thermoelectric (electrical and/or mechanical) stresses during operations and lifetime estimation. Second, machine learning based data-driven prognostic models are developed for predicting degradation behaviour of IGBT and determining remaining useful life using degradation raw data collected from accelerated aging tests under thermal overstress condition. The durations of various phases with increasing collector-emitter voltage are determined over the device lifetime. A data set of phase durations from several IGBTs is trained to develop Neural Network (NN) and Adaptive Neuro Fuzzy Inference System (ANFIS) models, which is used to predict remaining useful life (RUL) of IGBT. Results obtained from the presented case studies would pave the path for improving the reliability of IGBTs

Modelling and optimisation of solar voltaic system using fuzzy logic

There is considerable increase in residential solar grid connected installations with many advantages offered by solar energy. As more solar panels are connected to grid, the Solar Inverter between solar panels and grid have to perform at optimum levels. Modern Inverters consist of DC-DC Converter and DC-AC Inverter. One problem associated with Inverter design is voltage fluctuation, this defect lies in the DC-DC converter Maximum power tracking (MPPT) algorithms responsible for extracting maximum power from the solar panels. The defect is due to large sampling number required for conventional MPPT algorithm. This thesis has proposed a new MPPT algorithm based on Mamdani Fuzzy logic. In research we use 5 parameter one diode model for solar cell modelling. The P-V/I-V characteristics curve is generated. The P-V characteristics curves sectioned and input membership and output membership functions is created. And unique fuzzy rules is used to optimize fuzzy controller output. Mamdani Fuzzy logic algorithm is compared to traditional PI controller hill climbing method. When small sampling number is used hill climbing method response is slow and good at tracking. When big sampling number is used hill climbing method response is fast and not good at tracking. The voltage also fluctuates when sampling number is big. Fuzzy logic provides a compromised solution with best response time and moderate tracking accuracy compared to hill climbing method. Fuzzy Logic based DC-DC converter together with PLL and Recursive Discrete Fourier Transform (RDFT) DC-AC inverter synchronization algorithm is employed and simulated in matlab. The MPPT simulation is conducted for a realistic 2.5KW solar panels in a 8 x 2 Matrix. In addition the MPPT algorithm is analyzed to see if it performs under power quality and voltage level tolerance of utility grid requirements. The Fuzzy Logic MPPT is excellent at tracking power. When temperature is fixed and irradiance is varied, the maximum tracking error is 5.2% in all scenarios with one exception. When irradiance is fixed and temperature varied, the maximum tracking error is 1.98%. Furthermore the Fuzzy Logic MPPT meets the power quality and voltage level tolerance requirements of utility grid for irradiance over 600 W/m2. Power quality and voltage level tolerance requirements for irradiance under 600 W/m2 is not critical as this is outside twilight conditions. Out of all the Synchronization algorithm identified in this Thesis, RDFT achieves synchronization very quickly and in addition it suppresses harmonics and noise. The possibility of future study to extend MPPT is also briefly discussed. The extension of future study is using Takagi-Sugeno fuzzy logic. Takagi-Sugeno uses more sophisticated inference and rule evaluation mathematics

Time-Domain/Digital Frequency Synchronized Hysteresis Based Fully Integrated Voltage Regulator

abstract: Power management integrated circuit (PMIC) design is a key module in almost all electronics around us such as Phones, Tablets, Computers, Laptop, Electric vehicles, etc. The on-chip loads such as microprocessors cores, memories, Analog/RF, etc. requires multiple supply voltage domains. Providing these supply voltages from off-chip voltage regulators will increase the overall system cost and limits the performance due to the board and package parasitics. Therefore, an on-chip fully integrated voltage regulator (FIVR) is required. The dissertation presents a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher-order LC notch filter along with a flying capacitor which couples the input and output voltage ripple is implemented. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area. Thus achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. The peak efficiency obtained is 71% at 780 mA of load current. The power stage with the additional off-chip LC is utilized to design a highly integrated current mode hysteretic buck converter operating at 180 MHz. It achieves 20 ns of settling and 2-5 ns of rise/fall time for reference tracking. The second part of the dissertation discusses an integrated low voltage switched-capacitor based power sensor, to measure the output power of a DC-DC boost converter. This approach results in a lower complexity, area, power consumption, and a lower component count for the overall PV MPPT system. Designed in a 180 nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes 0.748 mW of power.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201