A Parametrization Tool for Power Electronics Design at System Level

This paper describes a parameterization software used for the generation of behavioral models of power converters. This tool eases the capture and generation of fast and accurate models based on the information provided by manufacturers and measures. The models incorporate many behavioral features and can be used at different levels in the analysis, design and verification of complete power distribution systems like aircraft and automotive power systems. Simulations of common tests of power systems are presented to show the functionality of the models

DC/DC Converter Parametric Models for System level Simulation

The objective of this work is to propose a whole solution for simulating power systems based on the use of behavioral DC/DC converter models. The proposed model is a generic model whose parameters can be obtained from data sheets (especially useful to model commercial converters) or equivalent tests. The model has configurable features which can be activated or disabled in order to perform optimal simulations or to generate models with different levels of abstraction to be used in a top-down design methodology

VHDL-AMS modeling and simulation of a direct sequence spread spectrum (DS-SS) transmitter

Many recent standards in telecommunications field are based on CDMA spread spectrum transmissions. In this paper, we describe a methodology for top-down design, modeling, and simulation of CDMA transmitter system using hardware description language VHDL-AMS. Details of VHDL-AMS implementation for each elementary block are shown. This paper together with the developed library of CDMA transmitter blocks are targeted towards engineers who work on behavioral modeling and simulation of complete CDMA systems using hardware description languages

Framework de síntese de sistemas digitais em alto nível de abstração para emprego em ferramentas CAD

The development of digital systems requires an extreme attention by the circuit designer due to the different abstraction domains that the same system could be; therefore, the difficulty of building a circuit might be higher primarily because a schematic in a high level of abstraction has to be modeled, and just then, from the constructed component, the system can be implemented into a low level language. According to the top down methodology, this process of translating a circuit from a level of abstraction to another is called synthesis. This project brings up a framework that is able to translate schematics of digital systems built on the CAD tool Logisim, into implementations at the hardware level. The set of tests applied on 41 different circuits models have shown that the tool ellaborated works and it is effective, ensuring the desired output.A modelagem de sistemas digitais exige que o designer de circuitos atente-se á adequação de um projeto aos demais domínios de abstração. Logo, o nível de dificuldade de construção de um circuito pode-se tornar um tanto quanto elevado, já que deve-se elaborar um modelo esquemático em um alto nível de abstração para depois então, `a partir do diagrama construído, implementar o sistema em uma linguagem de baixo nível. De acordo com a metodologia top down, esse processo de mudança de um sistema digital de um nível de abstração para outro nível mais baixo é denominado síntese. Este projeto oferece um framework capaz de realizar a tradução de modelos esquemáticos de circuitos lógicos produzidos através da ferramenta CAD Logisim para implementações a nível de descrição de hardware. Os testes executados em 41 modelos de circuitos mostraram que a ferramenta é confiável e cumpre de forma eficaz o seu propósito

Behavioral Modeling for High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS

High-level synthesis is highly demanded for managing the complexity of analog and mixed-signal system designs. However, synthesis methods are currently in their infancy. The absence of a high-level specification notation is an important limitation for the development of efficient synthesis methods

Continuous/Discrete Co-Simulation Interfaces from Formalization to Implementation

ABSTRACT Today’s systems-on-chip are growing in complexity as a result of a higher density of components on the same chip, and also on account of the heterogeneity of different modules that are particular to different application domains (i.e. mechanical, electrical, optical, biological and chemical). These systems can be found in a broad and diverse spectrum of applications in many industries, including but not limited to Automotive, Aerospace, Health Care and, Consumer Electronics. These multi-domain heterogeneous systems enable new applications and the creation of new markets. This thesis focuses on the design and the simulation of heterogeneous embedded systems, more specifically on continuous/discrete heterogeneous systems. Continuous-time and discrete-event models are at the core of the design of multi-domain systems. We present here a generic, language independent methodology for the design of continuous/discrete heterogeneous systems. This methodology is the basis for design of a new framework providing the interfaces that are in charge with the heterogeneous components adaptation. The methodology was successfully used for the implementation of different continuous/discrete systems such as: a glycemia level regulator, an analog/digital converter, a PID controller, a production chain control system and wimax system. Parts of the proposed methodology were adapted for the formalization, modeling and verification of an optical network on chip.---------- RÉSUMÉ Les systèmes sur puce sont de plus en plus complexes, pas seulement en terme de densité de composants sur la même puce mais aussi en terme d‘hétérogénéité des modules spécifiques pour différents domaines d’application (mécanique, électrique, optique, biologique chimique). On retrouve ces systèmes dans un grand éventail d’applications et dans divers industries tels que l’automobile, l’aéronautique, la santé, l’électroniques et autres. Ces systèmes hétérogènes multi-domaine permettent de nouvelles applications et la création de nouveaux marchés. Cette thèse se concentre sur la conception et la simulation des systèmes hétérogènes embarqués. Les modèles temps-continu et événement discret sont le noyau de la conception des systèmes multi-domaine. On présente ici l’analyse de modèles d’exécution et modèles de synchronisation des systèmes hétérogènes continu/discret, la définition d’une méthodologie générique pour la conception des outils de co-simulation des systèmes hétérogènes continus/discrets et la validation de la méthodologie par applications – la réalisation d’un cadre de co-simulation pour les systèmes continu/discret. La méthodologie exploite les techniques de vérification formelle et de la simulation. La conception des outils de simulation est basée sur la définition d’une architecture générique des interfaces de simulation ainsi que sur des modèles de synchronisation vérifiés formellement. La méthodologie a été utilisée pour l’implémentation d’un régulateur de niveau de glycémie. Une partie de la méthodologie a été adaptée pour la formalisation, la modélisation et la vérification formelle d’un réseau optique sur puce

Modellierung der Zuverlässigkeit bei Entwurf und Verifikation von Mixed-Signal-Schaltungen

Die zunehmende Verbreitung von Elektronik im Alltag und die weitere Verringerung der Strukturgrößen stellen neue Anforderungen an die Zuverlässigkeit und Verfügbarkeit integrierter Schaltungen. Die Arbeit zeigt ein systematisches Vorgehen zur Modellierung des funktionalen Schaltungsverhaltens und ergänzt es um neue Verfahren zur Berücksichtigung zuverlässigkeitsrelevanter Schaltungseigenschaften. Etablierte Verfahren aus der Mechanik zur Behandlung der Zuverlässigkeit werden auf die Degradationseffekte integrierter Halbleiterbauelemente angewandt. Entsprechende Lebensdauermodelle zu relevanten Degradationsmechanismen sind dargestellt. Ausgehend davon werden allgemeine Maße zur Zuverlässigkeitsbewertung von Bauelementen unter Anwendungsbedingungen abgeleitet. Die Diskussion von Methoden zur Analyse der Zuverlässigkeit ganzer Schaltungen im Entwurf rundet die Darstellung ab. Die entwickelten Verfahren dienen der Unterstützung eines schnellen und fehlerfreien Entwurfs sicherer und zuverlässiger Schaltungen. Die Optimierung einer Schaltung hinsichtlich ihres Alterungsverhaltens verdeutlicht diesen Nutzen.The widespread use of electronics in everyday life and its ongoing miniaturization poses new demands in terms of reliability and dependability of integrated circuits. Modeling as a means to support circuit and system design has been used for many years, mainly to represent the functional behavior. This thesis aims at the following objectives: • For known modeling techniques regarding the functional behavior a systematic methodology is developed and structured in an integrated modelling flow. • The developed methodology is extended by modeling non-functional characteristics particularly with regard to reliability. In this work reliability modeling covers primarily degradation effects that occur during normal operation and affect the electrical behavior of integrated devices. As an important precondition for the developed methods to consider electrical degradation, linear damage accumulation is assumed. That is, the sequence in time of the applied stress is not important, the damage accumulates linearly over time. As a result a systematic process to model the functional behavior of analog and mixed signal circuits is presented. It is amended by new methods to include reliability relevant characteristics of the circuit. Established methods from mechanical engineering to describe and analyze reliability are adopted and applied to the degradation effects of integrated semiconductor devices. Respective lifetime models for relevant degradation effects are presented. Starting from a generic model structure general measures are derived to assess reliability of devices exposed to application conditions. In addition methods to analyze reliability of large circuits in the design process are discussed. The developed methods support a fast and correct design of safe and reliable circuits. As an example the optimization of a circuit with respect to its degradation behavior is demonstrated.Die zunehmende Verbreitung von Elektronik im Alltag und die weitere Verringerung der Strukturgrößen stellt neue Anforderungen an die Zuverlässigkeit und Verfügbarkeit integrierter Schaltungen. Modellierung zur Unterstützung des Schaltkreis- und Systementwurfs wird seit langer Zeit eingesetzt, bisher hauptsächlich zur Nachbildung des funktionalen Verhaltens einer Schaltung. Die vorliegende Arbeit verfolgt zwei Ziele: • Zu bekannten Modellierungsverfahren für das funktionale Verhalten wird eine Systematik entwickelt und in einen durchgängigen Modellierungsablauf abgebildet. • Die Methodik wird um die Modellierung nichtfunktionaler Eigenschaften erweitert, insbesondere werden Verfahren zur Berücksichtigung der Zuverlässigkeit entwickelt. Für die Zuverlässigkeitsmodellierung werden in erster Linie Degradationseffekte betrachtet, die während des bestimmungsgemäßen Betriebs entstehen und sich auf das elektrische Verhalten integrierter Bauelemente auswirken. Als eine wesentliche Voraussetzung für die entwickelten Verfahren zur Berücksichtigung der elektrischen Degradation wird lineare Schadensakkumulation angenommen. Dies bedeutet, dass die zeitliche Abfolge des anliegenden Stresses keine Rolle spielt, sondern sich die entstehende Schädigung linear akkumuliert. Das Ergebnis der Arbeit ist eine systematische Vorgehensweise zur Modellierung des funktionalen Verhaltens von analogen und Mixed-Signal-Schaltungen. Diese wird ergänzt um neue Verfahren zur Berücksichtigung zuverlässigkeitsrelevanter Eigenschaften der Schaltung. Analogien zur Mechanik erlauben es, in diesem Bereich etablierte Vorgehensweisen zur Beschreibung und Analyse der Zuverlässigkeit zu übernehmen und auf die Degradationseffekte integrierter Halbleiterbauelemente anzuwenden. Entsprechende Lebensdauermodelle zu relevanten Degradationsmechanismen sind dargestellt. Ausgehend von der generellen Struktur solcher Modelle werden allgemeine Maße zur Zuverlässigkeitsbewertung von Bauelementen unter Anwendungsbedingungen abgeleitet. Die Diskussion von Methoden zur Analyse der Zuverlässigkeit ganzer Schaltungen im Entwurf rundet die Darstellung ab. Die entwickelten Verfahren dienen der Unterstützung eines schnellen und fehlerfreien Entwurfs sicherer und zuverlässiger Schaltungen. Anhand der Optimierung einer Schaltung auf der Grundlage ihres Alterungsverhaltens wird dieser Nutzen verdeutlicht

Intelligent optimisation of analogue circuits using particle swarm optimisation, genetic programming and genetic folding

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University London.This research presents various intelligent optimisation methods which are: genetic algorithm (GA), particle swarm optimisation (PSO), artificial bee colony algorithm (ABCA), firefly algorithm (FA) and bacterial foraging optimisation (BFO). It attempts to minimise analogue electronic filter and amplifier circuits, taking a cascode amplifier design as a case study, and utilising the above-mentioned intelligent optimisation algorithms with the aim of determining the best among them to be used. Small signal analysis (SSA) conversion of the cascode circuit is performed while mesh analysis is applied to transform the circuit to matrices form. Computer programmes are developed in Matlab using the above mentioned intelligent optimisation algorithms to minimise the cascode amplifier circuit. The objective function is based on input resistance, output resistance, power consumption, gain, upperfrequency band and lower frequency band. The cascode circuit result presented, applied the above-mentioned existing intelligent optimisation algorithms to optimise the same circuit and compared the techniques with the one using Nelder-Mead and the original circuit simulated in PSpice. Four circuit element types (resistors, capacitors, transistors and operational amplifier (op-amp)) are targeted using the optimisation techniques and subsequently compared to the initial circuit. The PSO based optimised result has proven to be best followed by that of GA optimised technique regarding power consumption reduction and frequency response. This work modifies symbolic circuit analysis in Matlab (MSCAM) tool which utilises Netlist from PSpice or from simulation to generate matrices. These matrices are used for optimisation or to compute circuit parameters. The tool is modified to handle both active and passive elements such as inductors, resistors, capacitors, transistors and op-amps. The transistors are transformed into SSA and op-amp use the SSA that is easy to implement in programming. Results are presented to illustrate the potential of the algorithm. Results are compared to PSpice simulation and the approach handled larger matrices dimensions compared to that of existing symbolic circuit analysis in Matlab tool (SCAM). The SCAM formed matrices by adding additional rows and columns due to how the algorithm was developed which takes more computer resources and limit its performance. Next to this, this work attempts to reduce component count in high-pass, low-pass, and all- pass active filters. Also, it uses a lower order filter to realise same results as higher order filter regarding frequency response curve. The optimisers applied are GA, PSO (the best two methods among them) and Nelder-Mead (the worst method) are used subsequently for the filters optimisation. The filters are converted into their SSA while nodal analysis is applied to transform the circuit to matrices form. High-pass, low-pass, and all- pass active filters results are presented to demonstrate the effectiveness of the technique. Results presented have shown that with a computer code, a lower order op-amp filter can be applied to realise the same results as that of a higher order one. Furthermore, PSO can realise the best results regarding frequency response for the three results, followed by GA whereas Nelder- Mead has the worst results. Furthermore, this research introduced genetic folding (GF), MSCAM, and automatically simulated Netlist into existing genetic programming (GP), which is a new contribution in this work, which enhances the development of independent Matlab toolbox for the evolution of passive and active filter circuits. The active filter circuit evolution especially when operational amplifier is involved as a component is of it first kind in circuit evolution. In the work, only one software package is used instead of combining PSpice and Matlab in electronic circuit simulation. This saves the elapsed time for moving the simulation between the two platforms and reduces the cost of subscription. The evolving circuit from GP using Matlab simulation is automatically transformed into a symbolic Netlist also by Matlab simulation. The Netlist is fed into MSCAM; where MSCAM uses it to generate matrices for the simulation. The matrices enhance frequency response analysis of low-pass, high-pass, band-pass, band-stop of active and passive filter circuits. After the circuit evolution using the developed GP, PSO is then applied to optimise some of the circuits. The algorithm is tested with twelve different circuits (five examples of the active filter, four examples of passive filter circuits and three examples of transistor amplifier circuits) and the results presented have shown that the algorithm is efficient regarding design.Tertiary Education Trust Fund (TETFUND) through University of Calabar, Nigeria

Engineering Education and Research Using MATLAB

MATLAB is a software package used primarily in the field of engineering for signal processing, numerical data analysis, modeling, programming, simulation, and computer graphic visualization. In the last few years, it has become widely accepted as an efficient tool, and, therefore, its use has significantly increased in scientific communities and academic institutions. This book consists of 20 chapters presenting research works using MATLAB tools. Chapters include techniques for programming and developing Graphical User Interfaces (GUIs), dynamic systems, electric machines, signal and image processing, power electronics, mixed signal circuits, genetic programming, digital watermarking, control systems, time-series regression modeling, and artificial neural networks