Signal and power integrity co-simulation using the multi-layer finite difference method

Mixed signal system-on-package (SoP) technology is a key enabler for increasing functional integration, especially in mobile and wireless systems. Due to the presence of multiple dissimilar modules, each having unique power supply requirements, the design of the power distribution network (PDN) becomes critical. Typically, this PDN is designed as alternating layers of power and ground planes with signal interconnects routed in between or on top of the planes. The goal for the simulation of multi-layer power/ground planes, is the following: Given a stack-up and other geometrical information, it is required to find the network parameters (S/Y/Z) between port locations. Commercial packages have extremely complicated stack-ups, and the trend to increasing integration at the package level only points to increasing complexity. It is computationally intractable to solve these problems using these existing methods. The approach proposed in this thesis for obtaining the response of the PDN is the multi-layer finite difference method (M-FDM). A surface mesh / finite difference based approach is developed, which leads to a system matrix that is sparse and banded, and can be solved efficiently. The contributions of this research are the following: 1. The development of a PDN modeler for multi-layer packages and boards called the the multi-layer finite difference method. 2. The enhancement of M-FDM using multi-port connection networks to include the effect of fringe fields and gap coupling. 3. An adaptive triangular mesh based scheme called the multi-layer finite element method (MFEM) to address the limitations of M-FDM 4. The use of modal decomposition for the co-simulation of signal nets with the PDN. 5. The use of a robust GA-based optimizer for the selection and placement of decoupling capacitors in multi-layer geometries. 6. Implementation of these methods in a tool called MSDT 1.Ph.D.Committee Chair: Madhavan Swaminathan; Committee Member: Andrew F. Peterson; Committee Member: David C. Keezer; Committee Member: Saibal Mukhopadyay; Committee Member: Suresh Sitarama

Frequency- and Time-Domain Yield Optimization of a Power Delivery Network Subject to Large Decoupling Capacitor Tolerances

Sub-optimal design of power delivery networks (PDN) may cause performance deterioration and severe functional failures on high-speed computer platforms. Voltage regulators (VR) distribute controlled voltage in the PDN to the active devices, providing a steady power supply at a desired DC voltage level with an acceptable noise level or ripple. Unacceptable voltage drops can be caused by transient switching currents at the devices. Many decoupling capacitors are commonly used to lower the PDN impedance profile in order to reduce power supply noise and to supply fast transient current to switching devices. However, commercially available decoupling capacitors typically present large manufacturing variability. In this paper, we first propose an optimization methodology that gradually finds the best compensation parameter values of a buck converter VR to meet suitable stability criteria. Simultaneously, the number of parallel decoupling capacitors in the PDN is minimized while meeting a frequency-domain impedance profile specification and a time-domain minimum voltage droop requirement under nominal parameter values. Finally, a statistical analysis, yield estimation, and yield optimization of the nominally optimized PDN subject to large decoupling capacitor tolerances is presented. We consider the impedance profile, transient voltage droop, and voltage regulator stability as the responses of interest for yield calculation.ITESO, A.C

Characterization and management of voltage noise in multi-core, multi-threaded processors

textReliability is one of the important issues of recent microprocessor design. Processors must provide correct behavior as users expect, and must not fail at any time. However, unreliable operation can be caused by excessive supply voltage fluctuations due to an inductive part in a microprocessor power distribution network. This voltage fluctuation issue is referred to as inductive or di/dt noise, and requires thorough analysis and sophisticated design solutions. This dissertation proposes an automated stressmark generation framework to characterize di/dt noise effect, and suggests a practical solution for management of di/dt effects while achieving performance and energy goals. First, the di/dt noise issue is analyzed from theory to a practical view. Inductance is a parasitic part in power distribution network for microprocessor, and its characteristics such as resonant frequencies are reviewed. Then, it is shown that supply voltage fluctuation from resonant behavior is much harmful than single event voltage fluctuations. Voltage fluctuations caused by standard benchmarks such as SPEC CPU2006, PARSEC, Linpack, etc. are studied. Next, an AUtomated DI/dT stressmark generation framework, referred to as AUDIT, is proposed to identify maximum voltage droop in a microprocessor power distribution network. The di/dt stressmark generated from AUDIT framework is an instruction sequence, which draws periodic high and low current pulses that maximize voltage fluctuations including voltage droops. AUDIT uses a Genetic Algorithm in scheduling and optimizing candidate instruction sequences to create a maximum voltage droop. In addition, AUDIT provides with both simulation and hardware measurement methods for finding maximum voltage droops in different design and verification stages of a processor. Failure points in hardware due to voltage droops are analyzed. Finally, a hardware technique, floating-point (FP) issue throttling, is examined, which provides a reduction in worst case voltage droop. This dissertation shows the impact of floating point throttling on voltage droop, and translates this reduction in voltage droop to an increase in operating frequency because additional guardband is no longer required to guard against droops resulting from heavy floating point usage. This dissertation presents two techniques to dynamically determine when to tradeoff FP throughput for reduced voltage margin and increased frequency. These techniques can work in software level without any modification of existing hardware.Electrical and Computer Engineerin

Modeling EMI Resulting from a Signal Via Transition Through Power/Ground Layers

Signal transitioning through layers on vias are very common in multi-layer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current must switch from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in noise on the power bus that can lead to signal integrity, as well as EMI problems. Numerical methods, such as the finite-difference time-domain (FDTD), Moment of Methods (MoM), and partial element equivalent circuit (PEEC) method, were employed herein to study this problem. The modeled results are supported by measurements. In addition, a common EMI mitigation approach of adding a decoupling capacitor was investigated with the FDTD method

Electromagnetic Interference and Compatibility

Recent progress in the fields of Electrical and Electronic Engineering has created new application scenarios and new Electromagnetic Compatibility (EMC) challenges, along with novel tools and methodologies to address them. This volume, which collects the contributions published in the “Electromagnetic Interference and Compatibility” Special Issue of MDPI Electronics, provides a vivid picture of current research trends and new developments in the rapidly evolving, broad area of EMC, including contributions on EMC issues in digital communications, power electronics, and analog integrated circuits and sensors, along with signal and power integrity and electromagnetic interference (EMI) suppression properties of materials

Simulated Annealing

The book contains 15 chapters presenting recent contributions of top researchers working with Simulated Annealing (SA). Although it represents a small sample of the research activity on SA, the book will certainly serve as a valuable tool for researchers interested in getting involved in this multidisciplinary field. In fact, one of the salient features is that the book is highly multidisciplinary in terms of application areas since it assembles experts from the fields of Biology, Telecommunications, Geology, Electronics and Medicine

A high-performance, multi-frequency micro-controlled Electrical Impedance Mammography (EIM) excitation and phantom validation system

The research concentrates on the design, development and calibration of a high performance Electrical Impedance Mammography (EIM) system for early detection of breast cancer at the macro and micro scale (at an early stage applicable for different breast sizes and shapes). The enhancement of the Electrical Impedance Tomography (EIT) system focuses on developing electrical and electronic instrumentations and improving the current source topologies to make them operate at multiple frequencies for the purpose of measuring permittivity and conductivity of different breast tissues. The calibration, assessment systems have employed current calibration in the EIT to evaluate the impedance distribution. This facilitates the acquisition of accurate impedance images to enable images of the internal structure of the breast to be constructed. A constraint on EIT systems is that the current injection system suffers from the effects of stray capacitance having a major impact on the hardware subsystem as the EIT is an ill-posed inverse problem which depends on the noise level in EIT measured data and regularization parameter in the reconstruction algorithm. This research aims are to prevent this problem by using a capacitance cancellation method based on a General Impedance Converter (GIC) implemented by operation of a second generation of current conveyor called OCCII-GIC and calibration methods to facilitate operation in the high frequency range. An EIT system based on a planar 85-electrode channel and using a Microcontroller unit (MCU) for addressing control between 85 electrodes and implementing calibration methods has been constructed. In EIT systems, assessment, validation of the performance and calibration of systematic errors in the electrical field generated inside of the interrogated volume is important. Evaluation of the EIT system will be assessed using a realistic electronic phantom (E-phantom). This enables the evaluation of the different conductivity values of the tissue, which has been created and evaluated based on the RSC circuit model for the different electrical conductivities and electrical impedivities in breast tissue

Technology 2001: The Second National Technology Transfer Conference and Exposition, volume 1

Papers from the technical sessions of the Technology 2001 Conference and Exposition are presented. The technical sessions featured discussions of advanced manufacturing, artificial intelligence, biotechnology, computer graphics and simulation, communications, data and information management, electronics, electro-optics, environmental technology, life sciences, materials science, medical advances, robotics, software engineering, and test and measurement

Micro/Nano Structures and Systems

Micro/Nano Structures and Systems: Analysis, Design, Manufacturing, and Reliability is a comprehensive guide that explores the various aspects of micro- and nanostructures and systems. From analysis and design to manufacturing and reliability, this reprint provides a thorough understanding of the latest methods and techniques used in the field. With an emphasis on modern computational and analytical methods and their integration with experimental techniques, this reprint is an invaluable resource for researchers and engineers working in the field of micro- and nanosystems, including micromachines, additive manufacturing at the microscale, micro/nano-electromechanical systems, and more. Written by leading experts in the field, this reprint offers a complete understanding of the physical and mechanical behavior of micro- and nanostructures, making it an essential reference for professionals in this field

The 2nd International Electronic Conference on Applied Sciences

This book is focused on the works presented at the 2nd International Electronic Conference on Applied Sciences, organized by Applied Sciences from 15 to 31 October 2021 on the MDPI Sciforum platform. Two decades have passed since the start of the 21st century. The development of sciences and technologies is growing ever faster today than in the previous century. The field of science is expanding, and the structure of science is becoming ever richer. Because of this expansion and fine structure growth, researchers may lose themselves in the deep forest of the ever-increasing frontiers and sub-fields being created. This international conference on the Applied Sciences was started to help scientists conduct their own research into the growth of these frontiers by breaking down barriers and connecting the many sub-fields to cut through this vast forest. These functions will allow researchers to see these frontiers and their surrounding (or quite distant) fields and sub-fields, and give them the opportunity to incubate and develop their knowledge even further with the aid of this multi-dimensional network