54,594 research outputs found

    Polynomial Synthesis of Asynchronous Automata

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    Zielonka's theorem shows that each regular set of Mazurkiewicz traces can be implemented as a system of synchronized processes with a distributed control structure called asynchronous automaton. This paper gives a polynomial algorithm for the synthesis of a non-deterministic asynchronous automaton from a regular Mazurkiewicz trace language. This new construction is based on an unfolding approach that improves the complexity of Zielonka's and Pighizzini's techniques in terms of the number of states.Comment: The MOdelling and VErification (MOVE) tea

    Software Synthesis is Hard -- and Simple

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    While the components of distributed hardware systems can reasonably be assumed to be synchronised, this is not the case for the components of distributed software systems. This has a strong impact on the class of synthesis problems for which decision procedures exist: While there is a rich family of distributed systems, including pipelines, chains, and rings, for which the realisability and synthesis problem is decidable if the system components are composed synchronously, it is well known that the asynchronous synthesis problem is only decidable for monolithic systems. From a theoretical point of view, this renders distributed software synthesis undecidable, and one is tempted to conclude that synthesis of asynchronous systems, and hence of software, is much harder than the synthesis of synchronous systems. Taking a more practical approach, however, reveals that bounded synthesis, one of the most promising synthesis techniques, can easily be extended to asynchronous systems. This merits the hope that the promising results from bounded synthesis will carry over to asynchronous systems as well

    Efficient Trace Encodings of Bounded Synthesis for Asynchronous Distributed Systems

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    The manual implementation of distributed systems is an error-prone task because of the asynchronous interplay of components and the environment. Bounded synthesis automatically generates an implementation for the specification of the distributed system if one exists. So far, bounded synthesis for distributed systems does not utilize their asynchronous nature. Instead, concurrent behavior of components is encoded by all interleavings and only then checked against the specification. We close this gap by identifying true concurrency in synthesis of asynchronous distributed systems represented as Petri games. This defines when several interleavings can be subsumed by one true concurrent trace. Thereby, fewer and shorter verification problems have to be solved in each iteration of the bounded synthesis algorithm. For Petri games, experimental results show that our implementation using true concurrency outperforms the implementation based on checking all interleavings

    Comparing Asynchronous ll-Complete Approximations and Quotient Based Abstractions

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    This paper is concerned with a detailed comparison of two different abstraction techniques for the construction of finite state symbolic models for controller synthesis of hybrid systems. Namely, we compare quotient based abstractions (QBA), with different realizations of strongest (asynchronous) ll-complete approximations (SAlCA) Even though the idea behind their construction is very similar, we show that they are generally incomparable both in terms of behavioral inclusion and similarity relations. We therefore derive necessary and sufficient conditions for QBA to coincide with particular realizations of SAlCA. Depending on the original system, either QBA or SAlCA can be a tighter abstraction

    An Asynchronous Circuit Design Language (ACDL)

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    This correspondence describes a special purpose Asynchronous Circuit Design Language (ACDL) for specifying the terminal behavior of asynchronous sequential circuits. The language is a valuable tool for formalizing and documenting asynchronous designs, as well as providing a user interface to a completely automated synthesis system. The language includes many special features which permit quick and precise specification of terminal behavior and is best suited for problems that are currently being described informally by word statements. Copyright © 1974 by The Institute of Electrical and Electronics Engineers, Inc

    Synthesis of multiple-input change asynchronous finite state machines

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    Asynchronous finite state machines (AFSMS) have been limited because multiple-input changes have been disallowed. In this paper, we present an architecture and synthesis system to overcome this limitation. The AFSM marks potentially hazardous state transitions, and prevents output during them. A synthesis tool to create the AFS M incorporates novel algorithms to detect the hazardous states

    Automated Synthesis of Distributed Self-Stabilizing Protocols

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    In this paper, we introduce an SMT-based method that automatically synthesizes a distributed self-stabilizing protocol from a given high-level specification and network topology. Unlike existing approaches, where synthesis algorithms require the explicit description of the set of legitimate states, our technique only needs the temporal behavior of the protocol. We extend our approach to synthesize ideal-stabilizing protocols, where every state is legitimate. We also extend our technique to synthesize monotonic-stabilizing protocols, where during recovery, each process can execute an most once one action. Our proposed methods are fully implemented and we report successful synthesis of well-known protocols such as Dijkstra's token ring, a self-stabilizing version of Raymond's mutual exclusion algorithm, ideal-stabilizing leader election and local mutual exclusion, as well as monotonic-stabilizing maximal independent set and distributed Grundy coloring
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