646 research outputs found
Design and analysis of optimized CORDIC based GMSK system on FPGA platform
The Gaussian minimum shift keying (GMSK) is one of the best suited digital modulation schemes in the global system for mobile communication (GSM) because of its constant envelop and spectral efficiency characteristics. Most of the conventional GMSK approaches failed to balance the digital modulation with efficient usage of spectrum. In this article, the hardware architecture of the optimized CORDIC-based GMSK system is designed, which includes GMSK Modulation with the channel and GMSK Demodulation. The modulation consists of non-return zero (NRZ) encoder, an integrator followed by Gaussian filtering and frequency modulation (FM). The GMSK demodulation consists of FM demodulator, followed by differentiation and NRZ decoder. The FM Modulation and demodulation use the optimized CORDIC model for an In-phase (I) and quadrature (Q) phase generation. The optimized CORDIC is designed by using quadrant mapping and pipelined structure to improve the hardware and computational complexity in GMSK systems. The GMSK system is designed on the Xilinx platform and implemented on Artix-7 and Spartan-3EFPGA. The hardware constraints like area, power, and timing utilization are summarized. The comparison of the optimized CORDIC model with similar CORDIC approaches is tabulated with improvements
Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals
Multimedia applications are driving wireless network operators to add high-speed data services such as Edge (E-GPRS), WCDMA (UMTS) and WLAN (IEEE 802.11a,b,g) to the existing GSM network. This creates the need for multi-mode cellular handsets that support a wide range of communication standards, each with a different RF frequency, signal bandwidth, modulation scheme etc. This in turn generates several design challenges for the analog and digital building blocks of the physical layer. In addition to the above-mentioned protocols, mobile devices often include Bluetooth, GPS, FM-radio and TV services that can work concurrently with data and voice communication. Multi-mode, multi-band, and multi-standard mobile terminals must satisfy all these different requirements. Sharing and/or switching transceiver building blocks in these handsets is mandatory in order to extend battery life and/or reduce cost. Only adaptive circuits that are able to reconfigure themselves within the handover time can meet the design requirements of a single receiver or transmitter covering all the different standards while ensuring seamless inter-interoperability. This paper presents analog and digital base-band circuits that are able to support GSM (with Edge), WCDMA (UMTS), WLAN and Bluetooth using reconfigurable building blocks. The blocks can trade off power consumption for performance on the fly, depending on the standard to be supported and the required QoS (Quality of Service) leve
INFRARED COMMUNICATION SYSTEMS FOR THE NAVIGATION IN INDOOR ENVIRONMENTS
The navigation systems are widely diffused in various fields of application.
The most popular navigation system is well known as Global Positioning System
(GPS): it is used essentially in an outdoor environment, due to the fact
that the buildings introduce an extremely high attenuation to the satellite
signals. In order to provide a navigation service inside the buildings, it is
necessary to implement a communication system capable to retrieve the user\u2019s
position and to deliver the navigation data in an appropriate format. This
thesis describes the architecture of a navigation system for people that need
to be guided through indoor environments, e.g., public buildings, hospitals,
where orientation is very critical. The system has to provide both navigation
and context aware information to people that may be in difficult emotive state
as it happens to patients and visitors in a hospital. As it is widely explained
in the whole thesis, the communication system uses an InfraRed (IR) optical
link, thus a general overview to the IR light, and the modulations used in
the optical communication systems is given. Moreover, one of the main topic
of this thesis is to illustrate a complete study of the optimized architecture
suitable to navigate an user inside a building.
The IR navigation system developed in this thesis has stemmed out from
a first reverse engineering step where an existing IR analog solution suited to
transmit only voice signals has been analyzed. A number of tests have been
carried out to characterize the existing analog solution, the modulation used (FM) and its main parameters. The need to have a new digital communication
system is suggested by the possibility to improve the performance, developing a
numerical transmission architecture: this allows to identify and, consequently,
to locate an user. In this thesis a complete study on the feasibility of the
digital architecture is proposed. All the technical details and justifications
will be illustrated and discussed, including the study made upon the analog
solution, keeping always in mind the need to maintain the compatibility with
the analog solution. The thesis will also illustrate the development of the
analog blocks that compose both transmission Front End and reception Front
End. A particular attention will be paid to the Front End implemented on the
receiver device, where the Received Signal Strength (RSS) value is needed. In
fact, the user must point the receiver device to the transmitter illuminator as
directly as possible (the : to do it correctly, a visual (or audible) indication of
the RSS could be useful.
Since the receiver device must be pointed in direction of the illuminator,
it should be useful to understand if the system\u2019s performance in an indoor
environment could be corrupted by the reflections of the IR beams: these reflections
are caused by the walls, windows or any other reflective surfaces. This
effect, called multipath is taken into account: a generic analytical expression of
the total received signal will be derived, and a simulation of the performance
degeneration will be shown.
Finally, the implementation of a working prototype is presented, with the
focus on the user interface.
The navigation system has been installed at the Oncology Reference Center
(CRO) hospital in Aviano (Italy), in the framework of the EasyMob project.
The EasyMob project will be introduced in this thesis, giving an overview
about the entire set of technologies used to navigate an user into a confined
space (e.g., colored visible light path guides and Thin Film Transistor (TFT)
displays). Moreover a deep study on a number of IR navigation architectures
is given, illustrating pros and cons of the infrastructure chosen and explained
in the whole thesis
Development of a Nanosatellite Software Defined Radio Communications System
Communications systems designed with application-specific integrated circuit (ASIC) technology suffer from one very significant disadvantage - the integrated circuits do not possess the ability of programmability. However, Software Defined Radio’s (SDR’s) integrated with Field Programmable Gate Arrays (FPGA) provide an opportunity to update the communication system on nanosatellites (which are physically difficult to access) due to their capability of performing signal processing in software. SDR signal processing is performed in software on reprogrammable elements such as FPGA’s. Applying this technique to nanosatellite communications systems will optimize the operations of the hardware, and increase the flexibility of the system.
In this research a transceiver algorithm for a nanosatellite software defined radio communications is designed. The developed design is capable of modulation of data to transmit information and demodulation of data to receive information. The transceiver algorithm also works at different baud rates. The design implementation was successfully tested with FPGA-based hardware to demonstrate feasibility of the transceiver design with a hardware platform suitable for SDR implementation
Portable Waveform Development for Software Defined Radios
This work focuses on the question: "How can we build waveforms that can be moved from one platform to another?\u27\u27 Therefore an approach based on the Model Driven Architecture was evaluated. Furthermore, a proof of concept is given with the port of a TETRA waveform from a USRP platform to an SFF SDR platform
A mixed-signal integrated circuit for FM-DCSK modulation
This paper presents a mixed-signal application-specific integrated circuit (ASIC) for a frequency-modulated differential chaos shift keying (FM-DCSK) communication system. The chip is conceived to serve as an experimental platform for the evaluation of the FM-DCSK modulation scheme, and includes several programming features toward this goal. The operation of the ASIC is herein illustrated for a data rate of 500 kb/s and a transmission bandwidth in the range of 17 MHz. Using signals acquired from the test platform, bit error rate (BER) estimations of the overall FM-DCSK communication link have been obtained assuming wireless transmission at the 2.4-GHz ISM band. Under all tested propagation conditions, including multipath effects, the system obtains a BER = 10-3 for Eb/No lower than 28 dB.Ministerio de Ciencia y Tecnología TIC2003-0235
A BIST solution for frequency domain characterization of analog circuits
This work presents an efficient implementation of a BIST solution for frequency characterization of analog systems. It allows a complete characterization in terms of magnitude and phase, including also harmonic distortion and offset measurements. Signal generation is performed using a modified filter, while response evaluation is based on 1storder ÓÄ modulation and very simple digital processing. The signal generator and the response analyzer have been implemented using the Switched-Capacitor (SC) technique in a standard 0.35ìm-3.3V CMOS technology. Both circuits have been separately validated, and an on-board prototype of the complete test system for frequency characterization has been implemented. Experimental results verify the functionality of the proposed approach, and a dynamic range of [email protected] (1MHz clock) has been demonstrated.Gobierno de España TEC2007-68072/MIC, TSI 020400- 2008-71Catrene European Project 2A105SR
Design of an Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture
Processing power is a key technical challenge holding back the development of a high-performance software defined radio (SDR). Traditionally, SDR has utilized digital signal processors (DSPs), but increasingly complex algorithms, higher data rates, and multi-tasking needs have exceed the processing capabilities of modern DSPs. Reconfigurable computers, such as field-programmable gate arrays (FPGAs), are popular alternatives because of their performance gains over software for streaming data applications like SDR. However, FPGAs have not yet realized the ideal SDR because architectures have not fully utilized their partial reconfiguration (PR) capabilities to bring needed flexibility. A reconfigurable processor architecture is proposed that utilizes PR in reconfigurable computers to achieve a more sophisticated SDR. The proposed processor contains run-time swappable blocks whose parameters and interconnects are programmable. The architecture is analyzed for performance and flexibility and compared with available alternate technologies. For a sample QPSK algorithm, hardware performance gains of at least 44x are seen over modern desktop processors and DSPs while most of their flexibility and extensibility is maintained
New strategies for low noise, agile PLL frequency synthesis
Phase-Locked Loop based frequency synthesis is an essential technique employed in wireless communication systems for local oscillator generation. The ultimate goal in any design of frequency synthesisers is to generate precise and stable output frequencies with fast switching and minimal spurious and phase noise. The conflict between high resolution and fast switching leads to two separate integer synthesisers to satisfy critical system requirements.
This thesis concerns a new sigma-delta fractional-N synthesiser design which is able to be directly modulated at high data rates while simultaneously achieving good noise performance. Measured results from a prototype indicate that fast switching, low noise and spurious free spectra are achieved for most covered frequencies. The phase noise of the unmodulated synthesiser was measured −113 dBc/Hz at 100 kHz offset from the carrier.
The intermodulation effect in synthesisers is capable of producing a family of spurious components of identical form to fractional spurs caused in quantisation process. This effect directly introduces high spurs on some channels of the synthesiser output. Numerical and analytic results describing this effect are presented and amplitude and distribution of the resulting fractional spurs are predicted and validated against simulated and measured results. Finally an experimental arrangement, based on a phase compensation technique, is presented demonstrating significant suppression of intermodulation-borne spurs.
A new technique, pre-distortion noise shaping, is proposed to dramatically reduce the impact of fractional spurs in fractional-N synthesisers. The key innovation is the introduction in the bitstream generation process of carefully-chosen set of components at identical offset frequencies and amplitudes and in anti-phase with the principal fractional spurs. These signals are used to modify the Σ-Δ noise shaping, so that fractional spurs are effectively cancelled. This approach can be highly effective in improving spectral purity and reduction of spurious components caused by the Σ-Δ modulator, quantisation noise, intermodulation effects and any other circuit factors. The spur cancellation is achieved in the digital part of the synthesiser without introducing additional circuitry. This technique has been convincingly demonstrated by simulated and experimental results
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