Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals

Multimedia applications are driving wireless network operators to add high-speed data services such as Edge (E-GPRS), WCDMA (UMTS) and WLAN (IEEE 802.11a,b,g) to the existing GSM network. This creates the need for multi-mode cellular handsets that support a wide range of communication standards, each with a different RF frequency, signal bandwidth, modulation scheme etc. This in turn generates several design challenges for the analog and digital building blocks of the physical layer. In addition to the above-mentioned protocols, mobile devices often include Bluetooth, GPS, FM-radio and TV services that can work concurrently with data and voice communication. Multi-mode, multi-band, and multi-standard mobile terminals must satisfy all these different requirements. Sharing and/or switching transceiver building blocks in these handsets is mandatory in order to extend battery life and/or reduce cost. Only adaptive circuits that are able to reconfigure themselves within the handover time can meet the design requirements of a single receiver or transmitter covering all the different standards while ensuring seamless inter-interoperability. This paper presents analog and digital base-band circuits that are able to support GSM (with Edge), WCDMA (UMTS), WLAN and Bluetooth using reconfigurable building blocks. The blocks can trade off power consumption for performance on the fly, depending on the standard to be supported and the required QoS (Quality of Service) leve

Per-Core DVFS with Switched-Capacitor Converters for Energy Efficiency in Manycore Processors

Integrating multiple power converters on-chip improves energy efficiency of manycore architectures. Switched-capacitor (SC) dc-dc converters are compatible with conventional CMOS processes, but traditional implementations suffer from limited conversion efficiency. We propose a dynamic voltage and frequency scaling scheme with SC converters that achieves high converter efficiency by allowing the output voltage to ripple and having the processor core frequency track the ripple. Minimum core energy is achieved by hopping between different converter modes and tuning body-bias voltages. A multicore processor model based on a 28-nm technology shows conversion efficiencies of 90% along with over 25% improvement in the overall chip energy efficiency

Embedded Electronics In Medical Applications

Proceedings of"Conference on Recent Advances in Biomaterials Dec 17-18 '10"Held at Saveetha School of Engineering, Saveetha University, Thandalam, Chennai-602 105, Tamilnadu, IndiaTheme 10Embedded Electronics In Medical Application

Energy autonomous systems : future trends in devices, technology, and systems

The rapid evolution of electronic devices since the beginning of the nanoelectronics era has brought about exceptional computational power in an ever shrinking system footprint. This has enabled among others the wealth of nomadic battery powered wireless systems (smart phones, mp3 players, GPS, …) that society currently enjoys. Emerging integration technologies enabling even smaller volumes and the associated increased functional density may bring about a new revolution in systems targeting wearable healthcare, wellness, lifestyle and industrial monitoring applications

Modelling and thermal analysis of a seismic borehole sensor: diploma 2015

Analysis and adaptation of an acquisition system for a seismometer to enable operation at high temperatures (up to 180 [°C]). The simulation software and thermal measurements are used to validate theoretical results

Design and development of power processing units for applications in electrically-propelled satellite systems

Electrospray technology provides a way to ionize specialized liquids by applying high voltages across a sharp porous tip and a metallic mesh. This technology is widely used in the field of mass spectroscopy for generating ions for testing purposes. The dawn of nano-satellites posed new challenges in the miniaturization of many conventional satellite sub-systems. One significant challenge faced in such a process was the miniaturization of the propulsion system. Electrosprays have started to find their application in the field of Aerospace Engineering and now are formally known as Electrospray Thrusters. These thrusters provide high specific impulse and are attractive substitutes to conventional gas propelled thrusters as they can be scaled down in size and can also provide extended mission times. Some of the new challenges faced in such applications are the generation of high voltages from a low voltage onboard battery, grounding, spacecraft charging, clearance, and reliability issues for long term usage. In this work, a complete design process is developed for the realization of such high voltages suitable for interfacing with an electrospray thruster. Simulation models for a new type of converter are assessed, and its feasibility is discussed. A hardware prototype is implemented, and the practical results are assessed. An analysis of the converter is presented, and the semiconductor and passive components are selected. Magnetic components are designed based on the analysis. Parallels are drawn between the theoretical and prototype model of the concept converter. Finally, the firmware of the converter is explained, and the communication protocol of the PPU is delineated. As the boards designed for the converter have to sustain high voltages and reliably operate in unfavorable environments, special PCB layout considerations must be used, which also forces a designer to look for various other materials for the PCB fabrication --Abstract, page iv

Power management and optimization

After many years of focusing on “faster” computers, people have started taking notice of the fact that the race for “speed” has had the unfortunate side effect of increasing the total power consumed, thereby increasing the total cost of ownership of these machines. The heat produced has required expensive cooling facilities. As a result, it is difficult to ignore the growing trend of “Green Computing,” which is defined by San Murugesan as “the study and practice of designing, manufacturing, using, and disposing of computers, servers, and associated subsystems – such as monitors, printers, storage devices, and networking and communication systems – efficiently and effectively with minimal or no impact on the environment”. There have been different approaches to green computing, some of which include data center power management, operating system support, power supply, storage hardware, video card and display hardware, resource allocation, virtualization, terminal servers and algorithmic efficiency. In this thesis, we particularly study the relation between algorithmic efficiency and power consumption, obtaining performance models in the process. The algorithms studied primarily include basic linear algebra routines, such as matrix and vector multiplications and iterative solvers. Our studies show that it if the source code is optimized and tuned to the particular hardware used, there is a possibility of reducing the total power consumed at only slight costs to the computation time. The data sets utilized in this thesis are not significantly large and consequently, the power savings are not large either. However, as these optimizations can be scaled to larger data sets, it presents a positive outlook for power savings in much larger research environments