Simulation and Analysis of Variable Gain DVCC Based Active Inductance and its Application in Constant K Prototype and Resonance Filter

The inductor is an essential component in many electronic systems. But the passive inductance is not suitable due to its dimension and magnetic interference. To overcome these issues, active inductance is preferred. Active inductance is simulated using the RC network connected with an active device(s). Here, VG-DVCC (Variable Gain Differential Voltage Current Conveyor) is proposed as an active device. The VG-DVCC with two external R and one C component forms the Impedance Converter which converts Active RC network into Active Inductance. This paper gives an overview of the design-simulation of Active Inductance and the frequency range analysis of its linearity. Also, it highlights applications in the realization of constant k-prototype and resonance filters

Simple Three-Input Single-Output Current-Mode Universal Filter Using Single VDCC

This paper presents a second-order current-mode filter with three-inputs and single-output current using single voltage differencing current conveyors (VDCC) along with one resistor and two grounded capacitors. The design of presented filter emphasizes on the use of a single active element without the multiple terminals VDCC which is convenient to implement the VDCC using commercially available IC for the practical test. Also, it can reduce the current tracking error at current output port and can reduce the number of transistor in the VDCC. The proposed filter can realize all the five generic filter responses, namely, band-pass (BP), band-reject (BR), low-pass (LP), high-pass (HP), and all-pass (AP) functions from the same configuration under various conditions in terms of three input current signals. Furthermore, the natural frequency and quality factor are electronically controlled. The output current node exhibits high impedance. Besides, the non-ideal case is also investigated. The simulation and experimental results using VDCC constructed from commercially available IC can validate the theoretical analyses

Tunable Fractional-Order Capacitance Multiplier Using Current Gain Adjustment

This paper brings new solution of linearly adjustable fractional-order capacitance multiplier. The adjustable current gain, linear in wide range of input current and with linear dependence on driving voltage, serves for these purposes and offers one-decade variation of equivalent capacity (pseudo-capacitance) between 24 and 429 F/sec^0.75 . The operational range was tested by PSpice simulations and by measurement using RC approximant of constant phase element of the order 0.25 in bandwidth from 20 Hz up to 1 MHz

Analog Implementation of Fractional-Order Elements and Their Applications

With advancements in the theory of fractional calculus and also with widespread engineering application of fractional-order systems, analog implementation of fractional-order integrators and differentiators have received considerable attention. This is due to the fact that this powerful mathematical tool allows us to describe and model a real-world phenomenon more accurately than via classical “integer” methods. Moreover, their additional degree of freedom allows researchers to design accurate and more robust systems that would be impractical or impossible to implement with conventional capacitors. Throughout this thesis, a wide range of problems associated with analog circuit design of fractional-order systems are covered: passive component optimization of resistive-capacitive and resistive-inductive type fractional-order elements, realization of active fractional-order capacitors (FOCs), analog implementation of fractional-order integrators, robust fractional-order proportional-integral control design, investigation of different materials for FOC fabrication having ultra-wide frequency band, low phase error, possible low- and high-frequency realization of fractional-order oscillators in analog domain, mathematical and experimental study of solid-state FOCs in series-, parallel- and interconnected circuit networks. Consequently, the proposed approaches in this thesis are important considerations in beyond the future studies of fractional dynamic systems