573 research outputs found

    Novel load identification techniques and a steady state self-tuning prototype for switching mode power supplies

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    Control of Switched Mode Power Supplies (SMPS) has been traditionally achieved through analog means with dedicated integrated circuits (ICs). However, as power systems are becoming increasingly complex, the classical concept of control has gradually evolved into the more general problem of power management, demanding functionalities that are hardly achievable in analog controllers. The high flexibility offered by digital controllers and their capability to implement sophisticated control strategies, together with the programmability of controller parameters, make digital control very attractive as an option for improving the features of dcdc converters. On the other side, digital controllers find their major weak point in the achievable dynamic performances of the closed loop system. Indeed, analogto-digital conversion times, computational delays and sampling-related delays strongly limit the small signal closed loop bandwidth of a digitally controlled SMPS. Quantization effects set other severe constraints not known to analog solutions. For these reasons, intensive scientific research activity is addressing the problem of making digital compensator stronger competitors against their analog counterparts in terms of achievable performances. In a wide range of applications, dcdc converters with high efficiency over the whole range of their load values are required. Integrated digital controllers for Switching Mode Power Supplies are gaining growing interest, since it has been shown the feasibility of digital controller ICs specifically developed for high frequency switching converters. One very interesting potential benefit is the use of autotuning of controller parameters (on-line controllers), so that the dynamic response can be set at the software level, independently of output capacitor filters, component variations and ageing. These kind of algorithms are able to identify the output filter configuration (system identification) and then automatically compute the best compensator gains to adjust system margins and bandwidth. In order to be an interesting solution, however, the self-tuning should satisfy two important requirements: it should not heavily affect converter operation under nominal condition and it should be based on a simple and robust algorithm whose complexity does not require a significant increase of the silicon area of the IC controller. The first issue is avoided performing the system identification (SI) with the system open loop configuration, where perturbations can be induced in the system before the start up. Much more challenging is to satisfy this requirement during steady state operations, where perturbations on the output voltage are limited by the regular operations of the converter. The main advantage of steady state SI methods, is the detection of possible non-idealities occurring during the converter operations. In this way, the system dynamics can be consequently adjusted with the compensator parameters tuning. The resource saving issue, requires the development of äd-hocßelf-tuning techniques specifically tailored for integrated digitally controlled converters. Considering the flexibility of digital control, self-tuning algorithms can be studied and easily integrated at hardware level into closed loop SMPS reducing development time and R & D costs. The work of this dissertation finds its origin in this context. Smart power management is accomplished by tuning the controller parameters accordingly to the identified converter configuration. Themain difficult for self-tuning techniques is the identification of the converter output filter configuration. Two novel system identification techniques have been validated in this dissertation. The open loop SI method is based on the system step response, while dithering amplification effects are exploited for the steady state SI method. The open loop method can be used as autotunig approach during or before the system start up, a step evolving reference voltage has been used as system perturbation and to obtain the output filter information with the Power Spectral Density (PSD) computation of the system step response. The use of ¢§ modulator is largely increasing in digital control feedback. During the steady state, the finite resolution introduces quantization effects on the signal path causing low frequency contributes of the digital control word. Through oversampling-dithering capabilities of ¢§ modulators, resolution improvements are obtained. The presented steady state identification techniques demonstrates that, amplifying the dithering effects on the signal path, the output filter information can be obtained on the digital side by processing with the PSD computation the perturbed output voltage. The amount of noise added on the output voltage does not affect the converter operations, mathematical considerations have been addressed and then justified both with a Matlab/Simulink fixed-point and a FPGA-based closed loop system. The load output filter identification of both algorithms, refer to the frequency domain. When the respective perturbations occurs, the system response is observed on the digital side and processed with the PSD computation. The extracted parameters are the resonant frequency ans the possible ESR (Effective Series Resistance) contributes,which can be detected as maximumin the PSD output. The SI methods have been validated for different configurations of buck converters on a fixed-point closed loop model, however, they can be easily applied to further converter configurations. The steady state method has been successfully integrated into a FPGA-based prototype for digitally controlled buck converters, that integrates a PSD computer needed for the load parameters identification. At this purpose, a novel VHDL-coded full-scalable hybrid processor for Constant Geometry FFT (CG-FFT) computation has been designed and integrated into the PSD computation system. The processor is based on a variation of the conventional algorithm used for FFT, which is the Constant-Geometry FFT (CG-FFT).Hybrid CORDIC-LUT scalable architectures, has been introduced as alternative approach for the twiddle factors (phase factors) computation needed during the FFT algorithms execution. The shared core architecture uses a single phase rotator to satisfy all TF requests. It can achieve improved logic saving by trading off with computational speed. The pipelined architecture is composed of a number of stages equal to the number of PEs and achieves the highest possible throughput, at the expense of more hardware usage

    Novel load identification techniques and a steady state self-tuning prototype for switching mode power supplies

    Get PDF
    Control of Switched Mode Power Supplies (SMPS) has been traditionally achieved through analog means with dedicated integrated circuits (ICs). However, as power systems are becoming increasingly complex, the classical concept of control has gradually evolved into the more general problem of power management, demanding functionalities that are hardly achievable in analog controllers. The high flexibility offered by digital controllers and their capability to implement sophisticated control strategies, together with the programmability of controller parameters, make digital control very attractive as an option for improving the features of dcdc converters. On the other side, digital controllers find their major weak point in the achievable dynamic performances of the closed loop system. Indeed, analogto-digital conversion times, computational delays and sampling-related delays strongly limit the small signal closed loop bandwidth of a digitally controlled SMPS. Quantization effects set other severe constraints not known to analog solutions. For these reasons, intensive scientific research activity is addressing the problem of making digital compensator stronger competitors against their analog counterparts in terms of achievable performances. In a wide range of applications, dcdc converters with high efficiency over the whole range of their load values are required. Integrated digital controllers for Switching Mode Power Supplies are gaining growing interest, since it has been shown the feasibility of digital controller ICs specifically developed for high frequency switching converters. One very interesting potential benefit is the use of autotuning of controller parameters (on-line controllers), so that the dynamic response can be set at the software level, independently of output capacitor filters, component variations and ageing. These kind of algorithms are able to identify the output filter configuration (system identification) and then automatically compute the best compensator gains to adjust system margins and bandwidth. In order to be an interesting solution, however, the self-tuning should satisfy two important requirements: it should not heavily affect converter operation under nominal condition and it should be based on a simple and robust algorithm whose complexity does not require a significant increase of the silicon area of the IC controller. The first issue is avoided performing the system identification (SI) with the system open loop configuration, where perturbations can be induced in the system before the start up. Much more challenging is to satisfy this requirement during steady state operations, where perturbations on the output voltage are limited by the regular operations of the converter. The main advantage of steady state SI methods, is the detection of possible non-idealities occurring during the converter operations. In this way, the system dynamics can be consequently adjusted with the compensator parameters tuning. The resource saving issue, requires the development of äd-hocßelf-tuning techniques specifically tailored for integrated digitally controlled converters. Considering the flexibility of digital control, self-tuning algorithms can be studied and easily integrated at hardware level into closed loop SMPS reducing development time and R & D costs. The work of this dissertation finds its origin in this context. Smart power management is accomplished by tuning the controller parameters accordingly to the identified converter configuration. Themain difficult for self-tuning techniques is the identification of the converter output filter configuration. Two novel system identification techniques have been validated in this dissertation. The open loop SI method is based on the system step response, while dithering amplification effects are exploited for the steady state SI method. The open loop method can be used as autotunig approach during or before the system start up, a step evolving reference voltage has been used as system perturbation and to obtain the output filter information with the Power Spectral Density (PSD) computation of the system step response. The use of ¢§ modulator is largely increasing in digital control feedback. During the steady state, the finite resolution introduces quantization effects on the signal path causing low frequency contributes of the digital control word. Through oversampling-dithering capabilities of ¢§ modulators, resolution improvements are obtained. The presented steady state identification techniques demonstrates that, amplifying the dithering effects on the signal path, the output filter information can be obtained on the digital side by processing with the PSD computation the perturbed output voltage. The amount of noise added on the output voltage does not affect the converter operations, mathematical considerations have been addressed and then justified both with a Matlab/Simulink fixed-point and a FPGA-based closed loop system. The load output filter identification of both algorithms, refer to the frequency domain. When the respective perturbations occurs, the system response is observed on the digital side and processed with the PSD computation. The extracted parameters are the resonant frequency ans the possible ESR (Effective Series Resistance) contributes,which can be detected as maximumin the PSD output. The SI methods have been validated for different configurations of buck converters on a fixed-point closed loop model, however, they can be easily applied to further converter configurations. The steady state method has been successfully integrated into a FPGA-based prototype for digitally controlled buck converters, that integrates a PSD computer needed for the load parameters identification. At this purpose, a novel VHDL-coded full-scalable hybrid processor for Constant Geometry FFT (CG-FFT) computation has been designed and integrated into the PSD computation system. The processor is based on a variation of the conventional algorithm used for FFT, which is the Constant-Geometry FFT (CG-FFT).Hybrid CORDIC-LUT scalable architectures, has been introduced as alternative approach for the twiddle factors (phase factors) computation needed during the FFT algorithms execution. The shared core architecture uses a single phase rotator to satisfy all TF requests. It can achieve improved logic saving by trading off with computational speed. The pipelined architecture is composed of a number of stages equal to the number of PEs and achieves the highest possible throughput, at the expense of more hardware usage

    Vessel Recognition in Induction Heating Appliances - A Deep-Learning Approach

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    The selection of a vessel by an induction-hob user has a significant impact on the performance of the appliance. Due to the induction heating physical phenomena, there exist many factors that modify the equivalent impedance of induction hobs and, consequently, the operational conditions of the inverter. In particular, the type of vessel, which is a sole decision of the user, strongly affects these parameters. Besides, the ferromagnetic properties of the different materials the vessels are made with, vary differently with the excitation level, and given that most of the domestic induction hobs are based on an ac-bus voltage arrangement, the excitation level continuously varies. The algorithm proposed in this work takes advantage of this fact to identify the equivalent impedance of the load and recognize the pot. This is accomplished through a phase-sensitive detector that was already proposed in the literature and the application of deep learning. Different convolutional neural networks are tested on an augmented experimental-based dataset and the proposed algorithm is implemented in an experimental prototype with a system-on-chip. The proposed implementation is presented as an effective and accurate method to characterize and discriminate between different pots that could enable further functionalities in new generations of induction hobs

    A versatile resonant tank identificationm methodology for induction heating systems

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    Induction heating has become the most advance heating process due to benefits, such as efficiency, performance, cleanness, and safety. In this process, the electromagnetic coupling between the induction coil and the induction target is a key, determining the heating performance as well as the resonant power converter operation. This letter proposes an accurate and cost-effective resonant tank identification method applied to induction heating systems. It is based on monitoring the resonant capacitor voltage in order to calculate the resonant tank quality factor. The proposed methodology has been tested using a versatile power electronics test bench applied to domestic induction heating, proving the feasibility of this proposal

    Soc-based in-cycle load identification of induction heating appliances

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    The equivalent load of an induction hob is strongly dependent on many parameters such as the switching frequency, the excitation level and the size, type, and material of the vessel. However, real-time methods with the ability to capture the variation of the load with the excitation level have not been proposed in the literature. This is an essential issue as most of the commercial induction hobs are based on an ac-bus voltage arrangement. This article proposes a method based on a phase-sensitive detector that offers an online tracking of the equivalent impedance for this type of arrangements. This algorithm enables advanced control functionalities such as clustering of vessels, material recognition, and premature detection of ferromagnetic saturation, among others. After simulation and experimental validation, the method is implemented into a prototype with a system-on-chip to verify its real-time behavior. The proposed approach is applied to different real-life situations that prove its great performance and applicability

    Asymmetrical Modulation Strategies for Partially Covered Inductors in Flexible Induction Heating Appliances

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    Cost-effective multi-output resonant inverter topologies are a key enabling technology for the development of flexible surfaces for induction heating appliances. These topologies present several challenges when applied to a wide range of IH-loads simultaneously. In this paper, two asymmetrical modulations are proposed as an alternative solution to control output power. The proposed approach has been verified using an experimental prototype featuring 2 induction heating loads up to 3.6 kW with output power control in the whole operating range

    Microprocessor based signal processing techniques for system identification and adaptive control of DC-DC converters

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    PhD ThesisMany industrial and consumer devices rely on switch mode power converters (SMPCs) to provide a reliable, well regulated, DC power supply. A poorly performing power supply can potentially compromise the characteristic behaviour, efficiency, and operating range of the device. To ensure accurate regulation of the SMPC, optimal control of the power converter output is required. However, SMPC uncertainties such as component variations and load changes will affect the performance of the controller. To compensate for these time varying problems, there is increasing interest in employing real-time adaptive control techniques in SMPC applications. It is important to note that many adaptive controllers constantly tune and adjust their parameters based upon on-line system identification. In the area of system identification and adaptive control, Recursive Least Square (RLS) method provide promising results in terms of fast convergence rate, small prediction error, accurate parametric estimation, and simple adaptive structure. Despite being popular, RLS methods often have limited application in low cost systems, such as SMPCs, due to the computationally heavy calculations demanding significant hardware resources which, in turn, may require a high specification microprocessor to successfully implement. For this reason, this thesis presents research into lower complexity adaptive signal processing and filtering techniques for on-line system identification and control of SMPCs systems. The thesis presents the novel application of a Dichotomous Coordinate Descent (DCD) algorithm for the system identification of a dc-dc buck converter. Two unique applications of the DCD algorithm are proposed; system identification and self-compensation of a dc-dc SMPC. Firstly, specific attention is given to the parameter estimation of dc-dc buck SMPC. It is computationally efficient, and uses an infinite impulse response (IIR) adaptive filter as a plant model. Importantly, the proposed method is able to identify the parameters quickly and accurately; thus offering an efficient hardware solution which is well suited to real-time applications. Secondly, new alternative adaptive schemes that do not depend entirely on estimating the plant parameters is embedded with DCD algorithm. The proposed technique is based on a simple adaptive filter method and uses a one-tap finite impulse response (FIR) prediction error filter (PEF). Experimental and simulation results clearly show the DCD technique can be optimised to achieve comparable performance to classic RLS algorithms. However, it is computationally superior; thus making it an ideal candidate technique for low cost microprocessor based applications.Iraq Ministry of Higher Educatio

    Identification and modelling of two phase dc-dc boost converter based on autoregressive moving average with exogenous, output-error and transfer function model structures

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    This research presents the identification and modelling of a two-phase DC-DC boost converter based on the autoregressive moving average with exogenous (ARMAX), output-error (OE) and transfer function (TF) model structures for low-voltage applications. The goals that led to this study were to reduce the time taken to design the controller and analyse the output of constant Kp and Ki generated from the auto tuning method. A two-phase boost converter employs as 180-degree phase shift from each phase to drive the power switch. This research focused more on the system identification approach to generate mathematical models from the open-loop response. The generated models were from the TF, ARMAX and OE model structures. The mathematical models were generated from the pulse-width modulation (PWM) input and voltage output of the two-phase boost converter itself in the time domain data. After the best model order was found to replace the two�phase boost converter with a mathematical model, the controller design took place. Some closed-loop blocks were designed for the mathematical models in MATLAB/Simulink software, which were also used to perform the auto-tuning of the proportional-integral (PI) controller. However, tuning methods such as the Ziegler-Nichols and the Cohen-Coon methods are more time-consuming. After the best values for constants Kp and Ki were determined, the values were used in the real hardware to analyse the output responses. The findings showed that Kp and Ki from the TF model showed 19% overshoot compared with those of the ARMAX and OE models, which were 25.36% and 24.6%, respectively. All of the output responses from the different Kp and Ki values resulted in less than 5% ripple voltage. It can be concluded that the best model from the system identification approach was the TF system model, since it had the lowest overshoot and the lowest percentage of output voltage rippl
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