Power management using photovoltaic cells for implantable devices

This paper presents a novel inductor-less switched capacitor (SC) DC-DC converter, which generates simultaneous dual-output voltages for implantable electronic devices. Present dual output converters are limited to fixed ratio gain, which degrade conversion efficiency when the input voltage changes. The proposed power converter offers both step-up and step-down conversion with 4-phase reconfigurable logic. With an input voltage of 1 V provided by photovoltaic (PV) cells, the proposed converter achieves step-up, step-down and synchronised voltage conversions in four gain modes. These are 1.5 V and 0.5 V for Normal mode, 2 V and 1 V for High mode, 2 V for Double Boost mode, as well as 3 V and 2 V for Super Boost mode with the ripple variation of 14-59 mV. The converter circuit has been simulated in standard 0.18 μm CMOS technology and the results agree with state-of-the-art SC converters. However, our proposed monolithically integrated PV powered circuit achieves a conversion efficiency of 85.26% and provides extra flexibility in terms of gain, which is advantageous for future implantable applications that have a range of inputs. This research is therefore an important step in achieving truly autonomous implantable electronic devices

RF Power Transfer, Energy Harvesting, and Power Management Strategies

Energy harvesting is the way to capture green energy. This can be thought of as a recycling process where energy is converted from one form (here, non-electrical) to another (here, electrical). This is done on the large energy scale as well as low energy scale. The former can enable sustainable operation of facilities, while the latter can have a significant impact on the problems of energy constrained portable applications. Different energy sources can be complementary to one another and combining multiple-source is of great importance. In particular, RF energy harvesting is a natural choice for the portable applications. There are many advantages, such as cordless operation and light-weight. Moreover, the needed infra-structure can possibly be incorporated with wearable and portable devices. RF energy harvesting is an enabling key player for Internet of Things technology. The RF energy harvesting systems consist of external antennas, LC matching networks, RF rectifiers for ac to dc conversion, and sometimes power management. Moreover, combining different energy harvesting sources is essential for robustness and sustainability. Wireless power transfer has recently been applied for battery charging of portable devices. This charging process impacts the daily experience of every human who uses electronic applications. Instead of having many types of cumbersome cords and many different standards while the users are responsible to connect periodically to ac outlets, the new approach is to have the transmitters ready in the near region and can transfer power wirelessly to the devices whenever needed. Wireless power transfer consists of a dc to ac conversion transmitter, coupled inductors between transmitter and receiver, and an ac to dc conversion receiver. Alternative far field operation is still tested for health issues. So, the focus in this study is on near field. The goals of this study are to investigate the possibilities of RF energy harvesting from various sources in the far field, dc energy combining, wireless power transfer in the near field, the underlying power management strategies, and the integration on silicon. This integration is the ultimate goal for cheap solutions to enable the technology for broader use. All systems were designed, implemented and tested to demonstrate proof-of concept prototypes

Power management systems based on switched-capacitor DC-DC converter for low-power wearable applications

The highly efficient ultra-low-power management unit is essential in powering low-power wearable electronics. Such devices are powered by a single input source, either by a battery or with the help of a renewable energy source. Thus, there is a demand for an energy conversion unit, in this case, a DC-DC converter, which can perform either step-up or step-down conversions to provide the required voltage at the load. Energy scavenging with a boost converter is an intriguing choice since it removes the necessity of bulky batteries and considerably extends the battery life. Wearable devices are typically powered by a monolithic battery. The commonly available battery such as Alkaline or Lithium-ion, degrade over time due to their life spans as it is limited by the number of charge cycles- which depend highly on the environmental and loading condition. Thus, once it reaches the maximum number of life cycles, the battery needs to be replaced. The operation of the wearable devices is limited by usable duration, which depends on the energy density of the battery. Once the stored energy is depleted, the operation of wearable devices is also affected, and hence it needs to be recharged. The energy harvesters- which gather the available energy from the surroundings, however, have no limitation on operating life. The application can become battery-less given that harvestable energy is sufficiently powering the low-power devices. Although the energy harvester may not completely replace the battery source, it ensures the maximum duration of use and assists to become autonomous and self-sustain devices. The photovoltaic (PV) cell is a promising candidate as a hypothetical input supply source among the energy harvesters due to its smaller area and high power density over other harvesters. Solar energy use PV harvester can convert ambient light energy into electrical energy and keep it in the storage device. The harvested output of PV cannot directly connect to wearable loads for two main reasons. Depending on the incoming light, the harvested current result in varying open-circuit voltage. It requires the power management circuit to deal with unregulated input variation. Second, depending on the PV cell's material type and an effective area, the I-V characteristic's performance varies, resulting in a variation of the output power. There are several works of maximum power point tracking (MPPT) methods that allow the solar energy harvester to achieve optimal harvested power. Therefore, the harvested power depends on the size and usually small area cell is sufficient for micro-watt loads low-powered applications. The available harvested voltage, however, is generally very low-voltage range between 0.4-0.6 V. The voltage ratings of electronics in standard wearable applications operate in 1.8-3 V voltages as described in introduction’s application example section. It is higher than the supply source can offer. The overcome the mismatch voltage between source and supply circuit, a DC-DC boost converter is necessary. The switch-mode converters are favoured over the linear converters due to their highly efficient and small area overhead. The inductive converter in the switch-mode converter is common due to its high-efficiency performance. However, the integration of the inductor in the miniaturised integrated on-chip design tends to be bulky. Therefore, the switched-capacitor approach DC-DC converters will be explored in this research. In the switched-capacitor converter universe, there is plenty of work for single-output designs for various topologies. Most converters are reconfigurable to the different DC voltage levels apart from Dickson and cross-coupled charge pump topologies due to their boosting power stage architecture through a number of stages. However, existing multi-output converters are limited to the fixed gain ratio. This work explores the reconfigurable dual-output converter with adjustable gain to compromise the research gap. The thesis's primary focus is to present the inductor-less, switched-capacitor-based DC-DC converter power management system (PMS) supplied by a varying input of PV energy harvester input source. The PMS should deliver highly efficient regulated voltage conversion ratio (VCR) outputs to low-power wearable electronic devices that constitute multi-function building blocks

Power Management ICs for Internet of Things, Energy Harvesting and Biomedical Devices

This dissertation focuses on the power management unit (PMU) and integrated circuits (ICs) for the internet of things (IoT), energy harvesting and biomedical devices. Three monolithic power harvesting methods are studied for different challenges of smart nodes of IoT networks. Firstly, we propose that an impedance tuning approach is implemented with a capacitor value modulation to eliminate the quiescent power consumption. Secondly, we develop a hill-climbing MPPT mechanism that reuses and processes the information of the hysteresis controller in the time-domain and is free of power hungry analog circuits. Furthermore, the typical power-performance tradeoff of the hysteresis controller is solved by a self-triggered one-shot mechanism. Thus, the output regulation achieves high-performance and yet low-power operations as low as 12 µW. Thirdly, we introduce a reconfigurable charge pump to provide the hybrid conversion ratios (CRs) as 1⅓× up to 8× for minimizing the charge redistribution loss. The reconfigurable feature also dynamically tunes to maximum power point tracking (MPPT) with the frequency modulation, resulting in a two-dimensional MPPT. Therefore, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are enhanced and flattened across a wide harvesting range as 0.45 to 3 V. In a conclusion, we successfully develop an energy harvesting method for the IoT smart nodes with lower cost, smaller size, higher conversion efficiency, and better applicability. For the biomedical devices, this dissertation presents a novel cost-effective automatic resonance tracking method with maximum power transfer (MPT) for piezoelectric transducers (PT). The proposed tracking method is based on a band-pass filter (BPF) oscillator, exploiting the PT’s intrinsic resonance point through a sensing bridge. It guarantees automatic resonance tracking and maximum electrical power converted into mechanical motion regardless of process variations and environmental interferences. Thus, the proposed BPF oscillator-based scheme was designed for an ultrasonic vessel sealing and dissecting (UVSD) system. The sealing and dissecting functions were verified experimentally in chicken tissue and glycerin. Furthermore, a combined sensing scheme circuit allows multiple surgical tissue debulking, vessel sealer and dissector (VSD) technologies to operate from the same sensing scheme board. Its advantage is that a single driver controller could be used for both systems simplifying the complexity and design cost. In a conclusion, we successfully develop an ultrasonic scalpel to replace the other electrosurgical counterparts and the conventional scalpels with lower cost and better functionality

WIRELESS POWER MANAGEMENT CIRCUITS FOR BIOMEDICAL IMPLANTABLE SYSTEMS

Ph.DDOCTOR OF PHILOSOPH

Battery-sourced switched-inductor multiple-output CMOS power-supply systems

Wireless microsystems add intelligence to larger systems by sensing, processing and transmitting information which can ultimately save energy and resources. Each function has their own power profile and supply level to maximize performance and save energy since they are powered by a small battery. Also, due to its small size, the battery has limited energy and therefore the power-supply system cannot consume much power. Switched-inductor converters are efficient across wide operating conditions but one fundamental challenge is integration because miniaturized dc-dc converters cannot afford to accommodate more than one off-chip power inductor. The objective of this research is to explore, develop, analyze, prototype, test, and evaluate how one switched inductor can derive power from a small battery to supply, regulate, and respond to several independent outputs reliably and accurately. Managing and stabilizing the feedback loops that supply several outputs at different voltages under diverse and dynamic loading conditions with one CMOS chip and one inductor is also challenging. Plus, since a single inductor cannot supply all outputs at once, steady-state ripples and load dumps produce cross-regulation effects that are difficult to manage and suppress. Additionally, as the battery depletes the power-supply system must be able to regulate both buck and boost voltages. The presented system can efficiently generate buck and boost voltages with the fastest response time while having a low silicon area consumption per output in a low-cost technology which can reduce the overall size and cost of the system.Ph.D

Area- and Energy- Efficient Modular Circuit Architecture for 1,024-Channel Parallel Neural Recording Microsystem.

This research focuses to develop system architectures and associated electronic circuits for a next generation neuroscience research tool, a massive-parallel neural recording system capable of recording 1,024 channels simultaneously. Three interdependent prototypes have been developed to address major challenges in realization of the massive-parallel neural recording microsystems: minimization of energy and area consumption while preserving high quality in recordings. First, a modular 128-channel Δ-ΔΣ AFE using the spectrum shaping has been designed and fabricated to propose an area-and energy efficient solution for neural recording AFEs. The AFE achieved 4.84 fJ/C−s·mm2 figure of merit that is the smallest the area-energy product among the state-of-the-art multichannel neural recording systems. It also features power and area consumption of 3.05 µW and 0.05 mm2 per channel, respectively while exhibiting 63.3 dB signal-to-noise ratio with 3.02 µVrms input referred noise. Second, an on-chip mixed signal neural signal compressor was built to reduce the energy consumption in handling and transmission of the recorded data since this occupies a large portion of the total energy consumption as the number of parallel recording increases. The compressor reduces the data rates of two distinct groups of neural signals that are essential for neuroscience research: LFP and AP without loss of informative signals. As a result, the power consumptions for the data handling and transmissions of the LFP and AP were reduced to about 1/5.35 and 1/10.54 of the uncompressed cases, respectively. In the total data handling and transmission, the measured power consumption per channel is 11.98 µW that is about 1/9 of 107.5 µW without the compression. Third, a compact on-chip dc-to-dc converter with constant 1 MHz switching frequency has been developed to provide reliable power supplies and enhance energy delivery efficiency to the massive-parallel neural recording systems. The dc-to-dc converter has only predictable tones at the output and it exhibits > 80% power conversion efficiency at ultra-light loads, < 100 µW that is relevant power most of the multi-channel neural recording systems consume. The dc-to-dc converter occupies 0.375 mm2 of area which is less than 1/20 of the area the first prototype consumes (8.64 mm2).PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133244/1/sungyun_1.pd

Circuits and systems for inductive power transfer

Recently, the development of Wireless Power Transfer (WPT) systems has shown to be a key factor for improving the robustness, usability and autonomy of many mobile devices. The WPT link relaxes the trade-off between the battery size and the power availability, enabling highly innovative applications. This thesis aims to develop novel techniques to increase efficiency and operating distance of inductive power transfer systems. We addressed the design of the inductive link and various circuits used in the receiver. Moreover, we performed a careful system-level analysis, taking into account the design of different blocks and their interaction. The analysis is oriented towards the development of low power applications, such as Active Implantable Medical Device (AIMD) or Radio-Frequency Identification (RFID) systems. Three main approaches were considered to increase efficiency and operating distance: 1) The use of additional resonant coils, placed between the transmitter and the receiver. 2) The receiver coil impedance matching. 3) The design of high-efficiency rectifiers and dc-dc converters. The effect of the additional coils in the inductive link is usually studied without considering its influence on other parts of the WPT system. In this work, we theoretically analyzed and compared 2 and 3-coil links, showing the advantages of using the additional coil together with a matching network in the receiver. The effect of the additional coils in a closed-loop regulated system is also addressed, demonstrating that the feedback-loop design should consider the number of coils used in the link. Furthermore, the inclusion of one additional resonant coil in an actual half-duplex RFID system at 134:2 kHz is presented. The maximum efficiency point can be achieved by adjusting the receiver coil load impedance in order to reach its optimum value. In inductive powering, this optimum impedance is often achieved by adapting the input impedance of a dc-dc converter in the receiver. A matching network can also be used for the same purpose, as have been analyzed in previous works. In this thesis, we propose a joint design using both, matching network and dc-dc converters, highlighting the benefits of using the combined approach. A rectifier must be included in any WPT receiver. Usually, a dc-dc converter is included after the rectifier to adjust the output voltage or control the rectifier load impedance. The efficiency of both, rectifier and dc-dc converter, impacts not only the load power but also the receiver dissipation. In applications such as AIMDs, to get the most amount of power with low dissipation is crucial to full safety requirements. We present the design of an active rectifier and a switched capacitor dc-dc converter. In low-power applications, the power consumption of any auxiliary block used in the circuit may decrease the efficiency due to its quiescent consumption. Therefore, we have carefully designed these auxiliary blocks, such as operational transconductance amplifiers and voltage comparators. The main contributions of this thesis are: . Deduction of simplified equations to compare 2 and 3-coil links with an optimized Matching Network (MN). . Development of a 3-coil link half-duplex RFID 134.2 kHz system. . Analysis of the influence of the titanium case in the inductive link of implantable medical devices. . Development of a joint design ow which exploits the advantages of using both MNs and dc-dc converters in the receiver to achieve load impedance matching. . Analysis of closed-loop postregulated systems, highlighting the effects that the additional coils, receiver resonance (series or parallel), and type of driver (voltage or current) used in the transmitter, have in the feedback control loop. . Proposal of systematic analysis and design of charge recycling switches in step-up dc-dc converters. . New architecture for low-power high slew-rate operational transconductance amplifier. Novel architecture for high-efficiency active rectifier. The thesis is essentially based on the publications [1{9]. During the PhD program, other publications were generated [10{15] that are partially or non-included in the thesis. Additionally, some contributions presented in the text, are in process of publication.Hace ya un buen tiempo que las redes inalámbricas constituyen uno de los temas de investigación más estudiados en el área de las telecomunicaciones. Actualmente un gran porcentaje de los esfuerzos de la comunidad científifica y del sector industrial están concentrados en la definición de los requerimientos y estándares de la quinta generación de redes móviles. 5G implicará la integración y adaptación de varias tecnologías, no solo del campo de las telecomunicaciones sino también de la informática y del análisis de datos, con el objetivo de lograr una red lo suficientemente flexible y escalable como para satisfacer los requerimientos para la enorme variedad de casos de uso implicados en el desarrollo de la “sociedad conectada”. Un problema que se presenta en las redes inalámbricas actuales, que por lo tanto genera un desafío más que interesante para lo que se viene, es la escasez de espectro radioeléctrico para poder asignar bandas a nuevas tecnologías y nuevos servicios. El espectro está sobreasignado a los diferentes servicios de telecomunicaciones existentes y las bandas de uso libre o no licenciadas están cada vez más saturadas de equipos que trabajan en ellas (basta pensar lo que sucede en la banda no licenciada de 2.4 GHz). Sin embargo, existen análisis y mediciones que muestran que en diversas zonas y en diversas escalas de tiempo, el espectro radioeléctrico, si bien está formalmente asignado a algún servicio, no se utiliza plenamente existiendo tiempos durante los cuales ciertas bandas están libres y potencialmente podrían ser usadas. Esto ha llevado a que las Redes Radios Cognitivas, concepto que existe desde hace un tiempo, sean consideradas uno de los pilares para el desarrollo de las redes inalámbricas del futuro. En los ultimos años la transferencia inalámbrica de energía (WPT) ha cobrado especial atención, ya que logra aumentar la robustez, usabilidad y autonomía de los dispositivos móviles. Transferir energía inalámbricamente relaja el compromiso entre el tamaño de la batería y la disponibilidad de energía, permitiendo aplicaciones que de otro modo no serían posibles. Esta tesis tiene como objetivo desarrollar técnicas novedosas para aumentar la eficiencia y la distancia de transmisión de sistemas de transferencia inalámbrica por acople inductivo (IPT). Se abordó el diseño del enlace inductivo y varios circuitos utilizados en el receptor de energía. Además, realizamos un cuidadoso análisis a nivel sistema, teniendo en cuenta el diseño conjunto de diferentes bloques. Todo el trabajo está orientado hacia el desarrollo de aplicaciones de bajo consumo, como dispositivos médicos implantables activos (AIMD) o sistemas de identificación por radio frecuencia (RFID). Se consideraron principalmente tres enfoques para lograr mayor eficienciay distancia: 1) El uso de bobinas resonantes adicionales, colocadas entre el transmisor y el receptor. 2) El uso de redes de adaptación de impedancia en el receptor. 3) El diseño de circuitos rectificdores y conversores dc-dc con alta eficiencia.El efecto ocasionado por las bobinas resonantes adicionales en el enlace inductivo es usualmente abordado sin tener en cuenta su influenciaen todas las partes del sistema. En este trabajo, analizamos teóricamente y comparamos sistemas de 2 y 3 bobinas, mostrando las ventajas que tiene la bobina adicional en conjunto con el uso de redes de adaptación. El efecto de dicha bobina, en sistemas de lazo cerrado fue también estudiado, demostrando que el diseño del lazo debe considerar el número de bobinas que utiliza el link. Se trabajó con un sistema real de RFID, analizando el uso de una bobina resonante en una aplicación práctica existente y de amplio uso en el Uruguay

Digital-based analog processing in nanoscale CMOS ICs for IoT applications

The Internet-of-Things (IoT) concept has been opening up a variety of applications, such as urban and environmental monitoring, smart health, surveillance, and home automation. Most of these IoT applications require more and more power/area efficient Complemen tary Metal–Oxide–Semiconductor (CMOS) systems and faster prototypes (lower time-to market), demanding special modifications in the current IoT design system bottleneck: the analog/RF interfaces. Specially after the 2000s, it is evident that there have been significant improvements in CMOS digital circuits when compared to analog building blocks. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consump tion, and cost, while the techniques running behind the analog signal processing are still lagging. To decrease this historical gap, there has been an increasing trend in finding alternative IC design strategies to implement typical analog functions exploiting Digital in-Concept Design Methodologies (DCDM). This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This thesis deals with the development of DCDM, demonstrating its compatibility for Ultra-Low-Voltage (ULV) and Power (ULP) IoT applications. This work proves this state ment through the proposing of new digital-based analog blocks, such as an Operational Transconductance Amplifiers (OTAs) and an ac-coupled Bio-signal Amplifier (BioAmp). As an initial contribution, for the first time, a silicon demonstration of an embryonic Digital-Based OTA (DB-OTA) published in 2013 is exhibited. The fabricated DB-OTA test chip occupies a compact area of 1,426 µm2 , operating at supply voltages (VDD) down to 300 mV, consuming only 590 pW while driving a capacitive load of 80pF. With a Total Harmonic Distortion (THD) lower than 5% for a 100mV input signal swing, its measured small-signal figure of merit (FOMS) and large-signal figure of merit (FOML) are 2,101 V −1 and 1,070, respectively. To the best of this thesis author’s knowledge, this measured power is the lowest reported to date in OTA literature, and its figures of merit are the best in sub-500mV OTAs reported to date. As the second step, mainly due to the robustness limitation of previous DB-OTA, a novel calibration-free digital-based topology is proposed, named here as Digital OTA (DIG OTA). A 180-nm DIGOTA test chip is also developed exhibiting an area below the 1000 µm2 wall, 2.4nW power under 150pF load, and a minimum VDD of 0.25 V. The proposed DIGOTA is more digital-like compared with DB-OTA since no pseudo-resistor is needed. As the last contribution, the previously proposed DIGOTA is then used as a building block to demonstrate the operation principle of power-efficient ULV and ultra-low area (ULA) fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA) such as extreme low area Body Dust. Measured results in 180nm CMOS confirm that the proposed BioDIGOTA can work with a supply voltage down to 400 mV, consuming only 95 nW. The BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art while keeping reasonable system performance, such as 7.6 Noise Efficiency Factor (NEF) with 1.25 µVRMS input-referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of the common-mode rejection ratio (CMRR) and 55 dB of power supply rejection ratio (PSRR). After reviewing the current DCDM trend and all proposed silicon demonstrations, the thesis concludes that, despite the current analog design strategies involved during the analog block development