The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

Segmented optical transmitter comprising a CMOS driver array and an InP IQ-MZM for advanced modulation formats

Segmented Mach-Zehnder modulators are promising solutions to generate complex modulation schemes in the migration towards optical links with a higher-spectral efficiency. We present an optical transmitter comprising a segmented-electrode InP IQ-MZM, capable of multilevel optical signal generation (5-bit per I/Q arm) by employing direct digital drive from integrated, low-power (1W) CMOS binary drivers. We discuss the advantages and design tradeoffs of the segmented driver structure and the implementation in a 40 nm CMOS technology. Multilevel operation with combined phase and amplitude modulation is demonstrated experimentally on a single MZM of the device for 2-ASK-2PSK and 4-ASK-2-PSK, showing potential for respectively 16-QAM and 64-QAM modulation in future assemblies

Robust and fast sliding-mode control for a DC-DC current-source parallel-resonant converter

Modern DC-DC resonant converters are normally built around a voltage-source series-resonant converter. This study aims to facilitate the practical use of current-source parallel-resonant converters due to their outstanding properties. To this end, this study presents a sliding-mode control scheme, which provides the following features to the closed-loop system: (i) high robustness to external disturbances and parameter variations and (ii) fast transient response during large and abrupt load changes. In addition, a design procedure for determining the values of the control parameters is presented. The theoretical contributions of this study are experimentally validated by selected tests on a laboratory prototype.Peer ReviewedPreprin

Design of a 3 GHz fine resolution LC DCO

In this thesis, the design of a fine resolution LC digitally controlled oscillator (DCO) is introduced. Two NMOS varactor banks are used to achieve 12 bits medium and fine frequency tuning. Both delta-sigma modulator and capacitive divider circuit are implemented to achieve a finer resolution and a larger dynamic range. The LC-oscillator has a coarse tuning range from 3.05 GHz to 3.85 GHz and a fine tuning range of 50MHz. It features a phase noise level of -115dBc/Hz at 1MHz frequency offset and consumes 5.4mW. Efficient simulation methodology is explored. Finally, this DCO is simulated in an All-Digital Phase Locked Loop (ADPLL) with other ideal behavior blocks implemented using Verilog-A, and the performance of the DCO is evaluated.Electrical and Computer Engineerin

Low-power 56Gb/s NRZ microring modulator driver in 28nm FDSOI CMOS

High speed optical interconnects require low-power compact electro-optical transmit modules comprising driver circuits and optical modulators. This letter presents a low power 56 Gb/s non-return-to-zero CMOS inverter-based driver in 28 nm fully depleted silicon-on-insulator CMOS driving a 46 GHz silicon photonic microring modulator. The driver delivers 1 Vpp to the microring modulator from a 75 mVpp input while only consuming 40 mW (710 fJ/bit at 56 Gb/s). The realized transmitter shows 4 dB extinction ratio when running of a 1 V supply voltage. Transmission experiments up to 2 km of single mode fiber show a bit-error-ratio less than 1 . 10(-9) at 56 Gb/s

All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications

SMART-E-PTDC/CTM-PAM/04012/2022, IDS-PAPER-PTDC/CTM-PAM/4241/2020 and PEST (CTS/UNINOVA)-UIDB/00066/2020. This work also received funding from the European Community’s H2020 program [Grant Agreement No. 716510 (ERC-2016-StG TREND) and 952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)]. Publisher Copyright: © 2022 by the authors.In this paper, the most suited analog-to-digital (A/D) converters (ADCs) for Internet of Things (IoT) applications are compared in terms of complexity, dynamic performance, and energy efficiency. Among them, an innovative hybrid topology, a digital–delta (Δ) modulator (ΔM) ADC employing noise shaping (NS), is proposed. To implement the active building blocks, several standard-cell-based synthesizable comparators and amplifiers are examined and compared in terms of their key performance parameters. The simulation results of a fully synthesizable Digital-ΔM with NS using passive and standard-cell-based circuitry show a peak of 72.5 dB in the signal-to-noise and distortion ratio (SNDR) for a 113 kHz input signal and 1 MHz bandwidth (BW). The estimated (Formula presented.) is close to 16.2 fJ/conv.-step.publishersversionpublishe

Modeling and analysis of power processing systems: Feasibility investigation and formulation of a methodology

A review is given of future power processing systems planned for the next 20 years, and the state-of-the-art of power processing design modeling and analysis techniques used to optimize power processing systems. A methodology of modeling and analysis of power processing equipment and systems has been formulated to fulfill future tradeoff studies and optimization requirements. Computer techniques were applied to simulate power processor performance and to optimize the design of power processing equipment. A program plan to systematically develop and apply the tools for power processing systems modeling and analysis is presented so that meaningful results can be obtained each year to aid the power processing system engineer and power processing equipment circuit designers in their conceptual and detail design and analysis tasks

A hybrid multilevel converter for medium and high voltage applications

This paper investigates the suitability of the hybrid multilevel converter for medium and high voltage application. The converter operation, modulation, and capacitor voltage balancing method are described in detail. The ability of the hybrid multilevel converter to operate with different modulation indices and load power factors is investigated. It has been established that the hybrid multilevel converter is capable of operating independent of load power factor. Operation with variable modulation index increases voltage stresses on the converter switches and does not alter the fundamental voltage magnitude as in all known voltage source converter topologies. The viability of the hybrid multilevel converter for medium and high voltage applications is confirmed by simulations

Feed-forward Space Vector Modulation for Single-Phase Multilevel Cascade Converters with any DC voltage ratio

Modulation techniques for multilevel converters can create distorted output voltages and currents if the DC link voltages are unbalanced. This situation can be avoided if the instantaneous DC voltage error is not taken into account in the modulation process. This paper proposes a feed-forward space vector modulation method for a single-phase multilevel cascade converter. Using this modulation technique, the modulated output voltage of the power converter always generates the reference determined by the controller even in worst case voltage unbalance conditions. In addition the possibility of optimizing the DC voltage ratio between the H-bridges of the power converter is introduced. Experimental results from a 5kVA prototype are presented in order to validate the proposed modulation technique