31 research outputs found

    11 Level boost inverter topology with dual-source configuration

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    With the advancement of the application of power converters in the power industry, the research towards the prominent power converter namely multilevel inverter has gained a lot of attraction. Here, a dual-source configured 11 level inverter topology is being discussed, which uses nine power semiconductor devices and one capacitor. The proposed topology is able to charge the capacitor up to 2Vdc which provides the boosting feature with the voltage gain of 1.67. An extended comparison with several other topologies has been provided which highlights the major contribution of the work. A low-power laboratory prototype has been used for the validation of the proposed 11 level topology. Further, a thorough assessment of comparable topologies has been conferred in detail. 2022 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.The authors acknowledge the support provided by King Abdullah City for Atomic and Renewable Energy (K.A.CARE) under K.A.CARE-King Abdulaziz University Collaboration Program. The Deanship of Scientific Research (DSR) at King Abdulaziz University, Jeddah, Saudi Arabia has funded this project, under grant no. (FP-108-43) and also the United Arab Emirates University (UAE-U) for supporting this research work through the AUA grants #12R022 and #31R280.Scopu

    Selective harmonic mitigation based two-scale frequency control of cascaded modified packed U-cell inverters

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    A new Modified Packed U-Cell (MPUC) converter architecture with cascading is proposed in this paper. To provide an output voltage of 25 levels, the proposed cascaded MPUC needs only twelve power switches and four power sources. The converter comprises two cascaded MPUCs with DC supply in a ratio of 5 : 1. One converter is operating at low frequency (LF) and the other at high frequency (HF) that leads to lower power losses and higher levels. Besides, a variable frequency method is anticipated to produce a 25-level output voltage which has low harmonic content (THD) with the help of Selective Harmonic Mitigation (SHM). The optimum switching angles for SHM are obtained through solving the SHM equations using the Genetic Algorithm (GA). The designed controller is efficient and suitable for applications that require low-frequency operation either in stand-alone or grid-tied. The proposed inverter and its operation procedure have been investigated using MATLAB®/Simulink software, and the findings demonstrate that the proposed inverter output voltage has reduced THD significantly. The simulation results are verified using the typhoon HIL-402 emulator. Also, the power loss analysis is done using PLECS. The maximum efficiency of the converter is found to be around 98.34 %. The simulation results justified the efficiency and viability of low 25-level THD voltages

    A dual source fed eleven level switched capacitor multilevel inverter with voltage boosting capability

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    This work introduces an 11-level switched-capacitor multilevel inverter (SCMLI) designed for solar photo-voltaic (PV) applications, capitalizing on the growing popularity of multilevel inverters due to their superior power quality. With a 1.67-times boosting capability, the proposed SCMLI employs 10 switches, 2 DC supplies, and 2 capacitors to achieve an 11-level output voltage waveform. The topology requires only seven driver circuits, incorporating 2 bidirectional switches and 3 complementary pairs of switches. The proposed inverter has intrinsic capacitor self-balancing features since the capacitors are connected across the DC voltage source at different times throughout a basic cycle to charge the capacitors at a level of input voltage. A thorough comparison between the topology and recently developed SCMLI’s has been presented. The comparison demonstrates the effectiveness in terms of switches, capacitors, sources, efficiency, total standing voltage (TSV), and boosting capacity. To experimentally validate its performance, the suggested SCMLI undergoes testing using a frequency-based switching method. The topology exhibits low total harmonic distortion (THD) of 7.65% in its output voltage waveform and 0.89% in the output current waveform

    A Novel Hybrid Single-Phase Modular Multilevel Inverter Topology with Enhanced Number of Levels per Number of Devices

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    Inverters are important in the electrical industry, and there have been several advancements in this area. One of these is the multilevel inverter. A new single-phase inverter with seventeen levels is suggested in this study. To spread the load, the DC inputs will be paired in series/parallel. To generate a wider number of output level voltages, a combination of switching devices and DC sources will be utilized. The harmonic components will be lowered by employing the new modulation approach. THD rate analysis for eleven level and seventeen level structure is performed, and THD quality enhancement can be shown herein. The simulation of suggested multilevel converter is performed in Matlab/Simulink.Peer reviewe

    A Single DC Source Nine-Level Switched-Capacitor Boost Inverter Topology with Reduced Switch Count

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    This paper presents a new boost inverter topology with nine level output voltage waveform using a single dc source and two switched capacitors. The capacitor voltages are self-balancing and thus is devoid of any sensors and auxiliary circuitry. The output voltage is twice higher than the input voltage, which eliminates the need for an input dc boost converter especially when the inverter is powered from a renewable source. The merits of the proposed topology in terms of the number of devices and cost are highlighted by comparing the recent and conventional inverter topologies. In addition to this, the total voltage stress of the proposed topology is lower and have a maximum efficiency of 98.25%. The operation and dynamic performance of the proposed topology have been simulated using PLECS software and are validated using an experimental setup considering a different dynamic operation.This work was supported in part by the Scientific Research Deanship, Taif University, Saudi Arabia, under Grant 1-439 - 6072.Scopu

    Review of Five-Level Front-End Converters for Renewable Energy Applications

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    Provisional fileWith the objective of minimizing environment and energy issues, distributed renewable energy sources have reached remarkable advancements along the last decades, with special emphasis on wind and solar photovoltaic installations, which are deemed as the future of power generation in modern power systems. The integration of renewable energy sources into the power system requires the use of advanced power electronics converters, representing a challenge within the paradigm of smart grids, e.g., to improve efficiency, to obtain high power density, to guarantee fault-tolerance, to reduce the control complexity and to mitigate power quality problems. This paper presents a specific review about front-end converters for renewable energy applications (more specifically the power inverter that interfaces the renewable energy source with the power grid). It is important to note that the objective of this paper is not to cover all types of front-end converters; the focus is only on single-phase multilevel structures limited to five voltage levels, based on a voltage-source arrangement and allowing current or voltage feedback control. The established review is presented considering the following main classifications: (a) Number of passive and active power semiconductors; (b) Fault tolerance features; (c) Control complexity; (d) Requirements of specific passive components as capacitor or inductors; (e) Number of independent or split dc-link voltages. Throughout the paper, several specific five-level front-end topologies are presented and comparisons are made between them, highlighting the pros and cons of each one of them as a candidate for the interface of renewable energy sources with the power grid.Fundação para a Ciência e Tecnologia (FCT

    Reptile search algorithm (RSA)-based selective harmonic elimination technique in Packed E-Cell (PEC-9) inverter

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    The multilevel inverters (MLIs) are capable of handling large quantities of power and generating high-quality output voltages. Consequently, the size of the filters is reduced, and the circuitry is simplified. As a result, they have a diverse range of uses in the industrial sector, especially in smart grids. The input voltage boosting feature is required to utilize the MLI with renewable energy. In addition, a large number of components are required to attain higher output voltage levels, which increases the cost of the circuit and weight. A variety of MLI topologies have been identified to reduce losses, device quantity, and device ratings. The selective harmonic elimination (SHE) approaches reduce distinct lower order harmonics by computing the ideal switching angles. This research presents a nine–level Packed E–Cell (PEC–9) inverter that uses selective harmonic elimination to eliminate total harmonic distortion. In order to calculate the best switching angle, the reptile search algorithm (RSA) is implemented in this paper, a nature–inspired metaheuristic algorithm inspired by the hunting behavior of the crocodile. The hunting behavior of crocodiles is implemented in two main steps: the first is encircling, which is accomplished by belly walking or high walking, and the second is hunting, which is accomplished by hunting cooperation or hunting coordination. In this technique, nonlinear transcendental equations have been solved. The simulation was run in the MATLAB R2021b software environment. The simulation results suggest that the RSA outperforms the other metaheuristic algorithms. Furthermore, the simulation result was validated on a hardware setup using DSP–TMS320F28379D in the laboratory

    Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation

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    Recently, multilevel inverters (MLIs) have gained lots of interest in industry and academia, as they are changing into a viable technology for numerous applications, such as renewable power conversion system and drives. For these high power and high/medium voltage applications, MLIs are widely used as one of the advanced power converter topologies. To produce high-quality output without the need for a large number of switches, development of reduced switch MLI (RS MLI) topologies has been a major focus of current research. Therefore, this review paper focuses on a number of recently developed MLIs used in various applications. To assist with advanced current research in this field and in the selection of suitable inverter for various applications, significant understanding on these topologies is clearly summarized based on the three categories, i.e., symmetrical, asymmetrical, and modified topologies. This review paper also includes a comparison based on important performance parameters, detailed technical challenges, current focus, and future development trends. By a suitable combination of switches, the MLI produces a staircase output with low harmonic distortion. For a better understanding of the working principle, a single-phase RS MLI topology is experimentally illustrated for different level generation using both fundamental and high switching frequency techniques which will help the readers to gain the utmost knowledge for advance research

    Robust Control and Stable Performance of a Grid-Tied Dumbbell-Type Multilevel Converter Interfaced DG Unit Using Differential Flatness Theory

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    This paper proposes a robust control technique based on Differential Flatness Theory (DFT) for a grid-tied Distributed Generation (DG) to mitigate several uncertainties while controlling the DG for its main functions. A recently introduced structure named Dumbbell Type (D-type) Switched-Capacitor Multilevel Converter (SC-MLC) with a single DC source, utilizing only ten switches with no further series diodes, is employed as an interfacing converter. The DFT enriched by the Lyapunov criterion is developed for the SC-MLC to guarantee both the stable performance of the proposed DG-based supply system and the robustness feature against any unwanted uncertainties. The control inputs of the D-type converter are initially shaped using the reactive and active power-based flat outputs without the observance of stability issues. To attain the proposed robust control inputs, a Lyapunov function is properly defined and engaged in providing the global asymptotic stability for the grid-tied multilevel converter by means of the proportional and integral errors of the flat outputs under the model uncertainties and parameter change. Lyapunov coefficients are subsequently assessed through their related active and reactive power errors. Both simulation and experimental results are employed to verify the ability of the proposed generation system in robust performance against parameter alternations, transient stability during contingency events at the grid side, and dynamic and steady state stability under different scenarios of power sharing with direct active and reactive power flows control.publishedVersionPeer reviewe

    Efficient, High Power Density, Modular Wide Band-gap Based Converters for Medium Voltage Application

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    Recent advances in semiconductor technology have accelerated developments in medium-voltage direct-current (MVDC) power system transmission and distribution. A DC-DC converter is widely considered to be the most important technology for future DC networks. Wide band-gap (WBG) power devices (i.e. Silicon Carbide (SiC) and Gallium Nitride (GaN) devices) have paved the way for improving the efficiency and power density of power converters by means of higher switching frequencies with lower conduction and switching losses compared to their Silicon (Si) counterparts. However, due to rapid variation of the voltage and current, di/dt and dv/dt, to fully utilize the advantages of the Wide-bandgap semiconductors, more focus is needed to design the printed circuit boards (PCB) in terms of minimizing the parasitic components, which impacts efficiency. The aim of this dissertation is to study the technical challenges associated with the implementation of WBG devices and propose different power converter topologies for MVDC applications. Ship power system with MVDC distribution is attracting widespread interest due to higher reliability and reduced fuel consumption. Also, since the charging time is a barrier for adopting the electric vehicles, increasing the voltage level of the dc bus to achieve the fast charging is considered to be the most important solution to address this concern. Moreover, raising the voltage level reduces the size and cost of cables in the car. Employing MVDC system in the power grid offers secure, flexible and efficient power flow. It is shown that to reach optimal performance in terms of low package inductance and high slew rate of switches, designing a PCB with low common source inductance, power loop inductance, and gate-driver loop are essential. Compared with traditional power converters, the proposed circuits can reduce the voltage stress on switches and diodes, as well as the input current ripple. A lower voltage stress allows the designer to employ the switches and diodes with lower on-resistance RDS(ON) and forward voltage drop, respectively. Consequently, more efficient power conversion system can be achieved. Moreover, the proposed converters offer a high voltage gain that helps the power switches with smaller duty-cycle, which leads to lower current and voltage stress across them. To verify the proposed concept and prove the correctness of the theoretical analysis, the laboratory prototype of the converters using WBG devices were implemented. The proposed converters can provide energy conversion with an efficiency of 97% feeding the nominal load, which is 2% more than the efficiency of the-state-of-the-art converters. Besides the efficiency, shrinking the current ripple leads to 50% size reduction of the input filter inductors
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