RF CMOS Wireless Implantable Microsystem for Sacral Roots Stimulation with On-Chip Antenna and Far-Field Wireless Powering

The use of heterogeneous integration technologies is the path for the development of further miniaturized, smarter, and energy autonomous microdevices, which are required to tackle the challenge of monitoring and/or control the health condition of everyone, everywhere. The interaction with human body requires the use of flexible materials, while the electronic component are based on rigid materials, like silicon substrates. Also, once inside the human body, it is desirable to have a wireless link for data communication, as well for RF powering, using energy harvesting techniques or dedicated powering RF links. This paper shows the design of an implantable microsystem to be used for functional electrical stimulation of sacral roots. The proposed system includes flexible electrodes, integrated with an RF CMOS chip, which is powered by a wireless link through an efficient on-chip antenna.This work was supported by the Portuguese Foundation for Science and Technology (SFRH/BD/62608/2009), FCT-PTDC/EEI-TEL/2881/2012, Programa Operacional Temático Fatores de Competitividade (COMPETE) and Fundo Comunitário Europeu FEDER.info:eu-repo/semantics/publishedVersio

Automatic Battery Charger For Mobile Application Using Solar Pv Module

This project aims to upgrade the efficiency and reliability of traditional charging by introducing an automatic battery charger using solar photovoltaic (PV) module where light radiation from the sun which is converted into electricity acted as power source and is harvested through the introduction of a small solar photovoltaic modules. This new introduction of automatic battery charger emphasizes on automatic charging and termination in order to ensure the battery is not endangered. This project will be carried out starting with the grasp of theoretical analysis, then move into the simulation phase with the aim to identify best circuit design for the project, and lastly the prototype construction phase. The end result of this project will involve a functional prototype that will be able to charge a mobile phone when exposed to the sun. The successfulness of this project will have a huge impact on the mobile application industry and media interactions businesses

High Performance Power Management Integrated Circuits for Portable Devices

abstract: Portable devices often require multiple power management IC (PMIC) to power different sub-modules, Li-ion batteries are well suited for portable devices because of its small size, high energy density and long life cycle. Since Li-ion battery is the major power source for portable device, fast and high-efficiency battery charging solution has become a major requirement in portable device application. In the first part of dissertation, a high performance Li-ion switching battery charger is proposed. Cascaded two loop (CTL) control architecture is used for seamless CC-CV transition, time based technique is utilized to minimize controller area and power consumption. Time domain controller is implemented by using voltage controlled oscillator (VCO) and voltage controlled delay line (VCDL). Several efficiency improvement techniques such as segmented power-FET, quasi-zero voltage switching (QZVS) and switching frequency reduction are proposed. The proposed switching battery charger is able to provide maximum 2 A charging current and has an peak efficiency of 93.3%. By configure the charger as boost converter, the charger is able to provide maximum 1.5 A charging current while achieving 96.3% peak efficiency. The second part of dissertation presents a digital low dropout regulator (DLDO) for system on a chip (SoC) in portable devices application. The proposed DLDO achieve fast transient settling time, lower undershoot/overshoot and higher PSR performance compared to state of the art. By having a good PSR performance, the proposed DLDO is able to power mixed signal load. To achieve a fast load transient response, a load transient detector (LTD) enables boost mode operation of the digital PI controller. The boost mode operation achieves sub microsecond settling time, and reduces the settling time by 50% to 250 ns, undershoot/overshoot by 35% to 250 mV and 17% to 125 mV without compromising the system stability.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

On-Demand Energy Harvesting Techniques - A System Level Perspective

In recent years, energy harvesting has been generating great interests among researchers, scientists and engineers alike. One of the major reasons for this increased interest sterns from the desire to have autonomous perpetual power supplies for remote monitoring sensor nodes utilizing some of the already available and otherwise wasted energy in the environment in a very innovative and useful way (and at the same time, maintaining a green environment). Scientists and engineers are constantly looking for ways of obtaining continuous and uninterrupted data from several points of interests especially remote or dangerous locations, using sensors coupled with RF transceivers, without the need of ever replacing or recharging the batteries that power these devices. This is now made possible through energy harvesting technologies which serve as suitable power supply substitutes, in many cases, for low power devices. With the proliferation of wireless energy in the environment through different radio frequency bands as well as natural sources like solar, wind and heat energy, it has become a desirable thing to take advantage of their availability by harvesting and converting them to useful electrical energy forms. The energy so harnessed or harvested could then be utilized in sensor nodes. Now, since these energy sources fluctuate from time to time, and from place to place, there is the need to have a form of energy accumulation, conversion, conditioning and storage. The stored energy would then be reconverted and used by the sensors nodes and/or RF transceivers when needed. The process through which this is done is referred to as energy management. In this research work, many types of energy harvesting transducers were explored including – solar, thermal, electromagnetic and piezo/vibration. A proof of concept approach for an on-demand electromagnetic power generator is then presented towards the end. While most, if not all, of the energy harvesting techniques discussed needed some time to accumulate enough charge to operate their respective systems, the on-demand energy harvester makes energy available as at and when needed. In summary, a system level design is presented with suggested future research works

Tri-band CMOS Circuit Dedicated for Ambient RF Energy Harvesting

RÉSUMÉ L'utilisation de systèmes sans fil connait une croissance rapide dans divers domaines tels que les réseaux de téléphonie cellulaire, Wi-Fi, Wi-Max, la radiodiffusion et les communications par satellite. Cette croissance mènera à une quantité considérable d'énergie électromagnétique générée dans l'air ambiant, mais toujours en dessous des limites de sécurité internationales. Ainsi, la recherche au niveau des systèmes de récupération d'énergie RF pour alimenter des appareils électroniques miniaturisés à faible consommation de puissance devient attrayante et prometteuse. Le bloc principal dans un système de récupération d'énergie RF est le redresseur qui détermine l'efficacité et la sensibilité de l'ensemble du système. Étant donné que la puissance RF ambiante est très faible, la quantité d'énergie captée par l'antenne l’est également. En outre, il y a des pertes au niveau du réseau d'adaptation d’impédance qui réduisent encore plus la puissance transmise au bloc redresseur. Par conséquent, la puissance disponible est trop faible pour faire fonctionner des redresseurs classiques. Dans ce mémoire, nous proposons trois redresseurs à trois-étages et à grilles totalement croisées-couplées en utilisant des transistors à faible tension de seuil afin d’opérer à de faibles puissances d'entrée. Les trois redresseurs ont été conçus et intégrés au sein d’une même puce fabriquée en utilisant une technologie CMOS 130nm d’IBM. Ils ont été optimisés à des fréquences de 880MHz, 1960MHz et 2.45GHz respectivement. Les résultats expérimentaux démontrent qu’ils atteignent une efficacité de conversion de puissance maximale de 62%, 62% et 56.2% respectivement. Les mesures montrent également une grande amélioration de l'efficacité à de faibles niveaux de puissance d'entrée. Afin de récupérer l'énergie ambiante de trois principales sources RF au Canada – GSM-850, GSM-1900 et Wi-Fi, un système de redresseur utilisé pour la combinaison de la puissance de ces trois canaux est simulé et analysé. Le système utilise une topologie consistant simplement à connecter les sorties des redresseurs ensemble pour charger le condensateur de charge. En dépit de la grande amélioration de l'efficacité et de la sensibilité dans la plage de 0-5μW, une baisse d'efficacité indésirable se produit aux puissances plus élevées. Ainsi, un nouveau bloc de gestion de l'alimentation est proposé. De plus, une antenne tri-bande est conçue et simulée pour diminuer le volume de l'ensemble du système de récupération d'énergie RF. En particulier, les pertes par réflexion obtenues sont de -25.43dB, -13.92dB et -12.73dB aux fréquences citées plus haut respectivement.---------- ABSTRACT Nowadays, the use of wireless systems has grown rapidly in various domains such as cellular phone networks, Wi-Fi, Wi-Max, radio broadcasting and satellite communications. The growing use of these wireless systems leads to considerable amount of electromagnetic energy generated in ambient air (of course, still below international safety limits). Thus the research in ambient RF energy harvesting system dedicated for powering up low-power-consumption miniaturized electronic devices becomes attractive and promising. The main block in a RF harvesting system is the rectifier which determines the efficiency and sensitivity of the whole system. Since ambient RF power is very low, the amount of power captured by the antenna is extremely low. Besides, there is loss on matching networks, thus the available power given to the rectifier block is too low for traditional rectifiers to operate. Therefore, in this master thesis, three three-stage fully gate cross-coupled rectifiers using low-thresholdvoltage transistors are proposed to overcome the dead zone in low input power range. The three rectifiers optimized at 880MHz, 1960MHz and 2.45GHz frequencies respectively are designed on one chip layout. Their experimental results are retrieved from this custom fabricated integrated circuit using IBM 130nm CMOS technology. They achieve peak efficiencies of 62%, 62% and 56.2% respectively and show great improvements on power conversion efficiency at low input power level. In order to harvest ambient RF energy from the three main RF contributors in Canada – GSM-850, GSM-1900 and Wi-Fi 2.4GHz, a rectifier system used for power combination from these three channels is simulated and analyzed. The system employs a simple topology by connecting the outputs together to charge the load capacitor. In spite of its high improvements on efficiency and sensitivity in 0-5μW range, an undesirable efficiency drop happens at higher input power levels. Thus an idea of power management block is proposed. In addition, a tri-band antenna is designed and simulated so as to decrease the volume of the overall RF energy harvesting system. It achieves return loss of -25.43dB, -13.92dB and - 12.73dB at each desired band respectively

Neuromodulador implantável com alimentação e comunicação sem fios em tecnologia RFCMOS 180 nm

Dissertação de mestrado integrado em Engenharia Biomédica (área de especialização em Eletrónica Médica)Existem diversas patologias associadas ao cérebro que não podem ser tratadas com o recurso a medicamentos. Para estas, é necessária a utilização de outro tipo de abordagens de tratamento. Um exemplo de uma doença neurológica que apresenta resistência a medicamentos é a epilepsia. Vários são os métodos alternativos para o tratamento desta doença, sendo a modulação térmica um deles. Apesar da elevada eficiência deste método, existem poucos dispositivos capazes de realizar este tipo de modulação, sendo que a maioria se encontra em investigação. Posto isto, é necessária a criação de sistemas de controlo para este tipo de modulação. O objetivo desta dissertação passa pela elaboração de um chip que possa ser usado como controlador de um neuromodulador térmico. Este chip controla a saída de uma fonte de corrente, limitando a corrente que atravessa o Peltier. No desenvolvimento do chip considerou-se que o sistema possui uma bateria como elemento armazenador de energia, sendo possível o seu carregamento sem fios, através da técnica de RF powering. Este dispositivo possui também comunicação bidirecional sem fios (com modulação OOK). Tanto as comunicações sem fios como o carregamento foram projetados para operar a uma frequência de 2 GHz. O chip foi fabricado utilizando a tecnologia UMC 0.18 μm CMOS e apresenta as dimensões de 1.5 x 1.5 !!". O seu consumo é de 17 mW quando se encontra com as suas funcionalidades reduzidas (emissor e fonte de corrente desligados) e 222 mW com todas as suas funcionalidades ativas. Este tipo de dispositivos apresenta diversas limitações e devem ser desenvolvidos tendo em conta alguns requisitos tais como: dimensão e capacidade de integração, consumo de energia, elemento armazenador de energia, fonte de energia, comunicação sem fios e o tipo de modulação. O chip desenvolvido, apesar de respeitar todos os requisitos referidos anteriormente, apresenta algumas características que ainda não se encontram otimizadas. Tal será feito numa próxima versão deste sistema. Adicionalmente, este dispositivo será implantado e testado em ratos.There are several pathologies associated with the brain that cannot be treated with medication. For this type of pathologies, it is necessary to use other approaches. An example of a neurological disease that is drug resistant is epilepsy. There are several alternative methods for the treatment of this disease, with thermal modulation being one of them. Despite of the high efficiency of this method, there are few devices capable of performing this type of modulation, and most are under investigation. Therefore, it is necessary to create control systems for this type of modulation. The aim of this dissertation is to elaborate a chip that can be used as a thermal neuromodulator controller. This chip controls a current source which has its output current regulated, limiting the current that flows through the Peltier. In the development of this chip it was considered that the system has got a battery as the energy storage element, being possible to charge it wirelessly through RF powering. This device also has got bidirectional wireless communication (with OOK modulation). Both wireless communications and charging were designed to operate at a frequency of 2 GHz. The chip was fabricated using UMC 0.18 μm CMOS technology and measures 1.5 x 1.5 !!". Its power draw is 17 mW when it has its functionalities reduced (emitter and current source turned off) and 222 mW with all its functionalities active. This type of device has several limitations and must be developed taking into account certain requirements such as: size and integration capacity, power consumption, energy storage element, power source, wireless communication and type of modulation. The developed chip, despite complying with all the requirements mentioned above, presents some features that are not yet optimized and should be optimized in an upcoming version of it. Furthermore, this device will be implanted and tested in rats.Integração no projeto de investigação PTDC/EEI-TEL/5250/2014, POCI-01-145-FEDER-16695

Integrated Data and Energy Communication Network: A Comprehensive Survey

OAPA In order to satisfy the power thirsty of communication devices in the imminent 5G era, wireless charging techniques have attracted much attention both from the academic and industrial communities. Although the inductive coupling and magnetic resonance based charging techniques are indeed capable of supplying energy in a wireless manner, they tend to restrict the freedom of movement. By contrast, RF signals are capable of supplying energy over distances, which are gradually inclining closer to our ultimate goal – charging anytime and anywhere. Furthermore, transmitters capable of emitting RF signals have been widely deployed, such as TV towers, cellular base stations and Wi-Fi access points. This communication infrastructure may indeed be employed also for wireless energy transfer (WET). Therefore, no extra investment in dedicated WET infrastructure is required. However, allowing RF signal based WET may impair the wireless information transfer (WIT) operating in the same spectrum. Hence, it is crucial to coordinate and balance WET and WIT for simultaneous wireless information and power transfer (SWIPT), which evolves to Integrated Data and Energy communication Networks (IDENs). To this end, a ubiquitous IDEN architecture is introduced by summarising its natural heterogeneity and by synthesising a diverse range of integrated WET and WIT scenarios. Then the inherent relationship between WET and WIT is revealed from an information theoretical perspective, which is followed by the critical appraisal of the hardware enabling techniques extracting energy from RF signals. Furthermore, the transceiver design, resource allocation and user scheduling as well as networking aspects are elaborated on. In a nutshell, this treatise can be used as a handbook for researchers and engineers, who are interested in enriching their knowledge base of IDENs and in putting this vision into practice

Design of Power Management Integrated Circuits and High-Performance ADCs

A battery-powered system has widely expanded its applications to implantable medical devices (IMDs) and portable electronic devices. Since portable devices or IMDs operate in the energy-constrained environment, their low-power operations in combination with efficiently sourcing energy to them are key problems to extend device life. This research proposes novel circuit techniques for two essential functions of a power receiving unit (PRU) in the energy-constrained environment, which are power management and signal processing. The first part of this dissertation discusses power management integrated circuits for a PRU. From a power management perspective, the most critical two circuit blocks are a front-end rectifier and a battery charger. The front-end CMOS active rectifier converts transmitted AC power into DC power. High power conversion efficiency (PCE) is required to reduce power loss during the power transfer, and high voltage conversion ratio (VCR) is required for the rectifier to enable low-voltage operations. The proposed 13.56-MHz CMOS active rectifier presents low-power circuit techniques for comparators and controllers to reduce increasing power loss of an active diode with offset/delay calibration. It is implemented with 5-V devices of a 0.35 µm CMOS process to support high voltage. A peak PCE of 89.0%, a peak VCR of 90.1%, and a maximum output power of 126.7 mW are measured for 200Ω loading. The linear battery charger stores the converted DC power into a battery. Since even small power saving can be enough to run the low-power PRU, a battery charger with low IvQ is desirable. The presented battery charger is based on a single amplifier for regulation and the charging phase transition from the constant-current (CC) phase to the constant-voltage (CV) phase. The proposed unified amplifier is based on stacked differential pairs which share the bias current. Its current-steering property removes multiple amplifiers for regulation and the CC-CV transition, and achieves high unity-gain loop bandwidth for fast regulation. The charger with the maximum charging current of 25 mA is implemented in 0.35 µm CMOS. A peak charger efficiency of 94% and average charger efficiency of 88% are achieved with an 80-mAh Li-ion polymer battery. The second part of this dissertation focuses on analog-to-digital converters (ADCs). From a signal processing perspective, an ADC is one of the most important circuit blocks in the PRU. Hence, an energy-efficient ADC is essential in the energy-constrained environment. A pipelined successive approximation register (SAR) ADC has good energy efficiency in a design space of moderate-to-high speeds and resolutions. Process-Voltage-Temperature variations of a dynamic amplifier in the pipelined-SAR ADC is a key design issue. This research presents two dynamic amplifier architectures for temperature compensation. One is based on a voltage-to-time converter (VTC) and a time-to-voltage converter (TVC), and the other is based on a temperature-dependent common-mode detector. The former amplifier is adopted in a 13-bit 10-50 MS/s subranging pipelined-SAR ADC fabricated in 0.13-µm CMOS. The ADC can operate under the power supply voltage of 0.8-1.2 V. Figure-of-Merits (FoMs) of 4-11.3 fJ/conversion-step are achieved. The latter amplifier is also implemented in 0.13-µm CMOS, consuming 0.11 mW at 50 MS/s. Its measured gain variation is 2.1% across the temperature range of -20°C to 85 °C

An ultra low power implantable neural recording system for brain-machine interfaces

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 179-187).In the past few decades, direct recordings from different areas of the brain have enabled scientists to gradually understand and unlock the secrets of neural coding. This scientific advancement has shown great promise for successful development of practical brain-machine interfaces (BMIs) to restore lost body functions to patients with disorders in the central nervous system. Practical BMIs require the uses of implantable wireless neural recording systems to record and process neural signals, before transmitting neural information wirelessly to an external device, while avoiding the risk of infection due to through-skin connections. The implantability requirement poses major constraints on the size and total power consumption of the neural recording system. This thesis presents the design of an ultra-low-power implantable wireless neural recording system for use in brain-machine interfaces. The system is capable of amplifying and digitizing neural signals from 32 recording electrodes, and processing the digitized neural data before transmitting the neural information wirelessly to a receiver at a data rate of 2.5 Mbps. By combining state-of-the-art custom ASICs, a commercially-available FPGA, and discrete components, the system achieves excellent energy efficiency, while still offering design flexibility during the system development phase. The system's power consumption of 6.4 mW from a 3.6-V supply at a wireless output data rate of 2.5 Mbps makes it the most energy-efficient implantable wireless neural recording system reported to date. The system is integrated on a flexible PCB platform with dimensions of 1.8 cm x 5.6 cm and is designed to be powered by an implantable Li-ion battery. As part of this thesis, I describe the design of low-power integrated circuits (ICs) for amplification and digitization of the neural signals, including a neural amplifier and a 32-channel neural recording IC. Low-power low-noise design techniques are utilized in the design of the neural amplifier such that it achieves a noise efficiency factor (NEF) of 2.67, which is close to the theoretical limit determined by physics. The neural recording IC consists of neural amplifiers, analog multiplexers, ADCs, serial programming interfaces, and a digital processing unit. It can amplify and digitize neural signals from 32 recording electrodes, with a sampling rate of 31.25 kS/s per channel, and send the digitized data off-chip for further processing. The IC was successfully tested in an in-vivo wireless recording experiment from a behaving primate with an average power dissipation per channel of 10.1 [mu]W. Such a system is also widely useful in implantable brain-machine interfaces for the blind and paralyzed, and in cochlea implants for the deaf.by Woradorn Wattanapanitch.Ph.D