227 research outputs found

    Research on Compiler Design and its Key Technologies for Embedded Systems

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    嵌入式系统处理器通常采用特定的指令集,其体系架构不具有通用性,因此,嵌入式系统的编译器开发无法满足不同嵌入式系统的软件开发需求,即使是通过移植方法来开发相应的嵌入式系统的编译器,也面临着可重定向方案设计等难题。针对嵌入式编译器的重定向难题,嵌入式系统对开发效率及高质量目标代码等多方面的需求,本论文就专用指令集嵌入式处理器(ASIPs)的编译器重定向、基于Cache的编译器优化及嵌入式多核静态调度等方面的理论和实践进行研究。 在对编译器的原理及理论基础进行介绍后,本论文首先针对ASIPs特点分析研究编译器可重定向及移植问题;接着给出能够实现编译器静态预测的方法,提高Cache复用率,解决“存储...There are different system architectures, specific instruction sets and tailored peripheral controllers in embedded System on Chips (SoCs). Because of the architectures versatility in embedded SoCs, the compiler development based on embedded system can't satisfy all the requirements for all the embedded processors. These result in the lack of embedded compiler and the difficulty of compiler transp...学位:工学博士院系专业:信息科学与技术学院_电路与系统学号:2312009015368

    User-defined data types and operators in occam

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    This paper describes the addition of user-defined monadic and dyadic operators to occam* [1], together with some libraries that demonstrate their use. It also discusses some techniques used in their implementation in KRoC [2] for a variety of target machines

    FSMD-Based Hardware Accelerators for FPGAs

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    Current VLSI technology allows the design of sophisticated digital systems with escalated demands in performance and power/energy consumption. The annual increase of chip complexity is 58%, while human designers productivity increase is limited to 21 % per annum (ITRS, 2011). The growing technology-productivity gap is probably the most importan

    C++ Templates as Partial Evaluation

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    This paper explores the relationship between C++ templates and partial evaluation. Templates were designed to support generic programming, but unintentionally provided the ability to perform compile-time computations and code generation. These features are completely accidental, and as a result their syntax is awkward. By recasting these features in terms of partial evaluation, a much simpler syntax can be achieved. C++ may be regarded as a two-level language in which types are first-class values. Template instantiation resembles an offline partial evaluator. This paper describes preliminary work toward a single mechanism based on Partial Evaluation which unifies generic programming, compile-time computation and code generation. The language Catat is introduced to illustrate these ideas.Comment: 13 page

    Understanding retargeting compilation techniques for network processors

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    Mémoire numérisé par la Direction des bibliothèques de l'Université de Montréal

    Simulador para processadores de sinal digital de arquitectura VLIW

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    Engenharia Eletrónica e TelecomunicaçõesDissertação apresentada a Universidade de Aveiro para cumprimento dos requisitos necessários a obtenção do grau de Mestre em Engenharia Eletrónica e Telecomunicações, realizada sob a orientação científica do Professor Doutor Manuel Bernardo Salvador Cunha, Professor Auxiliar do Departamento de Eletrónica, Telecomunicações e Informática da Universidade de Aveiro e Doutor Mohamed Bamakhrama, Hardware Tools Engineer na equipa "Processor and Compiler Tools" no grupo "Imaging and Camera Technologies", Intel Eindhoven, Países Baixos.Dissertation presented to Universidade de Aveiro with the goal of achieving a Master's Degree in Electronics and Telecommunications, made with the scienti c orientation of Professor Manuel Bernardo Salvador Cunha PhD, Professor at the Department of Electronic, Telecommunications and Informatics from Universidade de Aveiro and Mohamed Bamakhrama, Hardware Tools Engineer at Processor and Compiler Tools Team of Intel's Imaging and Camera Technologies Group, Eindhoven
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