A neural probe with up to 966 electrodes and up to 384 configurable channels in 0.13 μm SOI CMOS

In vivo recording of neural action-potential and local-field-potential signals requires the use of high-resolution penetrating probes. Several international initiatives to better understand the brain are driving technology efforts towards maximizing the number of recording sites while minimizing the neural probe dimensions. We designed and fabricated (0.13-μm SOI Al CMOS) a 384-channel configurable neural probe for large-scale in vivo recording of neural signals. Up to 966 selectable active electrodes were integrated along an implantable shank (70 μm wide, 10 mm long, 20 μm thick), achieving a crosstalk of −64.4 dB. The probe base (5 × 9 mm2) implements dual-band recording and a 1

Noise Efficient Integrated Amplifier Designs for Biomedical Applications

The recording of neural signals with small monolithically integrated amplifiers is of high interest in research as well as in commercial applications, where it is common to acquire 100 or more channels in parallel. This paper reviews the recent developments in low-noise biomedical amplifier design based on CMOS technology, including lateral bipolar devices. Seven major circuit topology categories are identified and analyzed on a per-channel basis in terms of their noise-efficiency factor (NEF), input-referred absolute noise, current consumption, and area. A historical trend towards lower NEF is observed whilst absolute noise power and current consumption exhibit a widespread over more than five orders of magnitude. The performance of lateral bipolar transistors as amplifier input devices is examined by transistor-level simulations and measurements from five different prototype designs fabricated in 180 nm and 350 nm CMOS technology. The lowest measured noise floor is 9.9 nV/√Hz with a 10 µA bias current, which results in a NEF of 1.2

CMOS Design of Reconfigurable SoC Systems for Impedance Sensor Devices

La rápida evolución en el campo de los sensores inteligentes, junto con los avances en las tecnologías de la computación y la comunicación, está revolucionando la forma en que recopilamos y analizamos datos del mundo físico para tomar decisiones, facilitando nuevas soluciones que desempeñan tareas que antes eran inconcebibles de lograr.La inclusión en un mismo dado de silicio de todos los elementos necesarios para un proceso de monitorización y actuación ha sido posible gracias a los avances en micro (y nano) electrónica. Al mismo tiempo, la evolución de las tecnologías de procesamiento y micromecanizado de superficies de silicio y otros materiales complementarios ha dado lugar al desarrollo de sensores integrados compatibles con CMOS, lo que permite la implementación de matrices de sensores de alta densidad. Así, la combinación de un sistema de adquisición basado en sensores on-Chip, junto con un microprocesador como núcleo digital donde se puede ejecutar la digitalización de señales, el procesamiento y la comunicación de datos proporciona características adicionales como reducción del coste, compacidad, portabilidad, alimentación por batería, facilidad de uso e intercambio inteligente de datos, aumentando su potencial número de aplicaciones.Esta tesis pretende profundizar en el diseño de un sistema portátil de medición de espectroscopía de impedancia de baja potencia operado por batería, basado en tecnologías microelectrónicas CMOS, que pueda integrarse con el sensor, proporcionando una implementación paralelizable sin incrementar significativamente el tamaño o el consumo, pero manteniendo las principales características de fiabilidad y sensibilidad de un instrumento de laboratorio. Esto requiere el diseño tanto de la etapa de gestión de la energía como de las diferentes celdas que conforman la interfaz, que habrán de satisfacer los requisitos de un alto rendimiento a la par que las exigentes restricciones de tamaño mínimo y bajo consumo requeridas en la monitorización portátil, características que son aún más críticas al considerar la tendencia actual hacia matrices de sensores.A nivel de celdas, se proponen diferentes circuitos en un proceso CMOS de 180 nm: un regulador de baja caída de voltaje como unidad de gestión de energía, que proporciona una alimentación de 1.8 V estable, de bajo ruido, precisa e independiente de la carga para todo el sistema; amplificadores de instrumentación con una aproximación completamente diferencial, que incluyen una etapa de entrada de voltaje/corriente configurable, ganancia programable y ancho de banda ajustable, tanto en la frecuencia de corte baja como alta; un multiplicador para conformar la demodulación dual, que está embebido en el amplificador para optimizar consumo y área; y filtros pasa baja totalmente integrados, que actúan como extractores de magnitud de DC, con frecuencias de corte ajustables desde sub-Hz hasta cientos de Hz.<br /

Amplifiers in Biomedical Engineering: A Review from Application Perspectives

Continuous monitoring and treatment of various diseases with biomedical technologies and wearable electronics has become significantly important. The healthcare area is an important, evolving field that, among other things, requires electronic and micro-electromechanical technologies. Designed circuits and smart devices can lead to reduced hospitalization time and hospitals equipped with high-quality equipment. Some of these devices can also be implanted inside the body. Recently, various implanted electronic devices for monitoring and diagnosing diseases have been presented. These instruments require communication links through wireless technologies. In the transmitters of these devices, power amplifiers are the most important components and their performance plays important roles. This paper is devoted to collecting and providing a comprehensive review on the various designed implanted amplifiers for advanced biomedical applications. The reported amplifiers vary with respect to the class/type of amplifier, implemented CMOS technology, frequency band, output power, and the overall efficiency of the designs. The purpose of the authors is to provide a general view of the available solutions, and any researcher can obtain suitable circuit designs that can be selected for their problem by reading this survey

Low Power Circuits for Smart Flexible ECG Sensors

Cardiovascular diseases (CVDs) are the world leading cause of death. In-home heart condition monitoring effectively reduced the CVD patient hospitalization rate. Flexible electrocardiogram (ECG) sensor provides an affordable, convenient and comfortable in-home monitoring solution. The three critical building blocks of the ECG sensor i.e., analog frontend (AFE), QRS detector, and cardiac arrhythmia classifier (CAC), are studied in this research. A fully differential difference amplifier (FDDA) based AFE that employs DC-coupled input stage increases the input impedance and improves CMRR. A parasitic capacitor reuse technique is proposed to improve the noise/area efficiency and CMRR. An on-body DC bias scheme is introduced to deal with the input DC offset. Implemented in 0.35m CMOS process with an area of 0.405mm2, the proposed AFE consumes 0.9W at 1.8V and shows excellent noise effective factor of 2.55, and CMRR of 76dB. Experiment shows the proposed AFE not only picks up clean ECG signal with electrodes placed as close as 2cm under both resting and walking conditions, but also obtains the distinct -wave after eye blink from EEG recording. A personalized QRS detection algorithm is proposed to achieve an average positive prediction rate of 99.39% and sensitivity rate of 99.21%. The user-specific template avoids the complicate models and parameters used in existing algorithms while covers most situations for practical applications. The detection is based on the comparison of the correlation coefficient of the user-specific template with the ECG segment under detection. The proposed one-target clustering reduced the required loops. A continuous-in-time discrete-in-amplitude (CTDA) artificial neural network (ANN) based CAC is proposed for the smart ECG sensor. The proposed CAC achieves over 98% classification accuracy for 4 types of beats defined by AAMI (Association for the Advancement of Medical Instrumentation). The CTDA scheme significantly reduces the input sample numbers and simplifies the sample representation to one bit. Thus, the number of arithmetic operations and the ANN structure are greatly simplified. The proposed CAC is verified by FPGA and implemented in 0.18m CMOS process. Simulation results show it can operate at clock frequencies from 10KHz to 50MHz. Average power for the patient with 75bpm heart rate is 13.34W

700mV low power low noise implantable neural recording system design

This dissertation presents the work for design and implementation of a low power, low noise neural recording system consisting of Bandpass Amplifier and Pipelined Analog to Digital Converter (ADC) for recording neural signal activities. A low power, low noise two stage neural amplifier for use in an intelligent Radio-Frequency Identification (RFID) based on folded cascode Operational Transconductance Amplifier (OTA) is utilized to amplify the neural signals. The optimization of the number of amplifier stages is discussed to achieve the minimum power and area consumption. The amplifier power supply is 0.7V. The midband gain of amplifier is 58.4dB with a 3dB bandwidth from 0.71 to 8.26 kHz. Measured input-referred noise and total power consumption are 20.7 μVrms and 1.90 μW respectively. The measured result shows that the optimizing the number of stages can achieve lower power consumption and demonstrates the neural amplifier's suitability for instu neutral activity recording. The advantage of power consumption of Pipelined ADC over Successive Approximation Register (SAR) ADC and Delta-Sigma ADC is discussed. An 8 bit fully differential (FD) Pipeline ADC for use in a smart RFID is presented in this dissertation. The Multiplying Digital to Analog Converter (MDAC) utilizes a novel offset cancellation technique robust to device leakage to reduce the input drift voltage. Simulation results of static and dynamic performance show this low power Pipeline ADC is suitable for multi-channel neural recording applications. The performance of all proposed building blocks is verified through test chips fabricated in IBM 180nm CMOS process. Both bench-top and real animal test results demonstrate the system's capability of recording neural signals for neural spike detection

Wireless tools for neuromodulation

Epilepsy is a spectrum of diseases characterized by recurrent seizures. It is estimated that 50 million individuals worldwide are affected and 30% of cases are medically refractory or drug resistant. Vagus nerve stimulation (VNS) and deep brain stimulation (DBS) are the only FDA approved device based therapies. Neither therapy offers complete seizure freedom in a majority of users. Novel methodologies are needed to better understand mechanisms and chronic nature of epilepsy. Most tools for neuromodulation in rodents are tethered. The few wireless devices use batteries or are inductively powered. The tether restricts movement, limits behavioral tests, and increases the risk of infection. Batteries are large and heavy with a limited lifetime. Inductive powering suffers from rapid efficiency drops due to alignment mismatches and increased distances. Miniature wireless tools that offer behavioral freedom, data acquisition, and stimulation are needed. This dissertation presents a platform of electrical, optical and radiofrequency (RF) technologies for device based neuromodulation. The platform can be configured with features including: two channels differential recording, one channel electrical stimulation, and one channel optical stimulation. Typical device operation consumes less than 4 mW. The analog front end has a bandwidth of 0.7 Hz - 1 kHz and a gain of 60 dB, and the constant current driver provides biphasic electrical stimulation. For use with optogenetics, the deep brain optical stimulation module provides 27 mW/mm2 of blue light (473 nm) with 21.01 mA. Pairing of stimulating and recording technologies allows closed-loop operation. A wireless powering cage is designed using the resonantly coupled filter energy transfer (RCFET) methodology. RF energy is coupled through magnetic resonance. The cage has a PTE ranging from 1.8-6.28% for a volume of 11 x 11 x 11 in3. This is sufficient to chronically house subjects. The technologies are validated through various in vivo preparations. The tools are designed to study epilepsy, SUDEP, and urinary incontinence but can be configured for other studies. The broad application of these technologies can enable the scientific community to better study chronic diseases and closed-loop therapies

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field

Current-efficient preamplifier architecture for CMRR sensitive neural recording applications

Este trabajo fue parcialmente financiado por CSIC (Comisión Sectorial de Investigación Científica, Uruguay), ANII (Agencia Nacional de Investigación e Innovación, Uruguay) y CAP (Comisión Académica de Posgrado, Uruguay).There are neural recording applications in which the amplitude of common-mode interfering signals is several orders of magnitude higher than the amplitude of the signals of interest. This challenging situation for neural amplifiers occurs, among other applications, in neural recordings of weakly electric fish or nerve activity recordings made with cuff electrodes. This paper reports an integrated neural amplifier architecture targeting invivo recording of local field potentials and unitary signals from the brain stem of a weakly electric fish Gymnotus omarorum. The proposed architecture offers low noise, high common-mode rejection ratio (CMRR), current-efficiency, and a high-pass frequency fixed without MOS pseudoresistors. The main contributions of this work are the overall architecture coupled with an efficient and simple single-stage circuit for the amplifier main transconductor, and the ability of the amplifier to acquire biopotential signals from high-amplitude common-mode interference in an unshielded environment. A fully-integrated neural preamplifier, which performs well in line with the state-of-the-art of the field while providing enhanced CMRR performance, was fabricated in a 0.5 μm CMOS process. Results from measurements show that the gain is 49.5 dB, the bandwidth ranges from 13 Hz to 9.8 kHz, the equivalent input noise is 1.88 μVrms, the CMRR is 87 dB and the Noise Efficiency Factor is 2.1. In addition, in-vivo recordings of weakly electric fish neural activity performed by the proposed amplifier are introduced and favorably compared with those of a commercial laboratory instrumentation system