Fabrication of microprobes on a ultrathick glass substrate with narrow-pitch electrical feedthroughs for next-generation lsi burn-in tests

MEMS 2008, Tucson, AZ, USA, January 13-17, 200

Development of dielectric materials for low temperature co-fired ceramics (LTCC) application

Low temperature co-fired ceramics (LTCC) technology allows constructing three-dimensional structure of electronic components and facilitates the assembly of devices made of different types of materials and presented with different functions. The development of high performance LTCC materials is a big challenging in this field due to the limitation of the processing conditions and the selection of potential candidate materials. The controllable stability and repeatability are also critical issues. This thesis is to challenge these difficulties by conducting systematic research on the chemical composition, phase formation, structure, electrical and thermal properties of potential candidate materials to develop a series of LTCC materials with optimal performance. In this thesis, the novel sol-gel process is introduced to prepare the amorphous phase, rather than using traditional molten glass, for better chemical composition control. Two amorphous materials, Amorphous phase-1 (AP-1) and Amorphous phase-2 (AP-2), are synthesized in the temperature range of 600oC and 700oC. The final chemical composition of AP-1 is 79.51% SiO2-0.81% Na2O-2.41% K2O-2.50% CaO-14.77% B2O3, and that of AP-2 is 80.78% SiO2-0.27% Na2O-0.87% K2O-3.45% CaO-5.25% BaO-9.38% B2O3 (mole ratio). The processing condition is optimized to reduce residual carbon and avoid crystallisation out of the amorphous phase. The controllability of low-melting chemical components in amorphous phases will reduce the sintering temperature of LTCC materials in a manageable manner. The sol-gel derived amorphous phases are used to develop the LTCC composites with dielectric constant at different values and optimized thermal expansion property. As results, the hexagonal Al2O3 is mixed with 50.19wt% AP-1 and 46.65wt% AP-2, respectively, to form the composites which show dielectric constant of 7-8 and the coefficient of thermal expansion (CTE) of ~6ppm/oC when sintered between 850oC and 900oC for 6h. The composite made up of 60wt% monoclinic ZrO2 and 40wt% AP-1 presents dielectric constant of ~11 and CTE of ~6ppm/oC when sintered at 850oC for 0.5h. The composite with the composition of 42.86wt% AP-1+52.38wt% fused SiO2+4.76wt% Al2O3 exhibits dielectric constant of ~5 and CTE of 3.26ppm/oC when sintered at 850oC for 6h. This series of LTCC materials with adjustable dielectric constant and appropriate thermal expansion property can provide a flexibility in electronic circuit designs. Besides the sol-gel derived amorphous phases, we also introduced a cubic KBSi2O6 phase with simpler composition as the precursor to develop the LTCC materials for the first time. Different from the amorphous phase forming vacuous liquid to densify the composites, this silicate exhibits good tolerance for ionic substitutions (such as Al substituting B), and thus lead to intimate contact of phases in the sintered sample to achieve well densified microstructure. As the result, the composition of developed sample is Al2O3: KBSi2O6: CaO=1.07: 1: 0.4 (mole ratio). It shows dielectric constant of ~8 and CTE of 11.04~12.46ppm/oC when sintered between 850oC and 900oC. Overall, utilizing the sol-gel derived amorphous phases and unique crystalline KBSi2O6 phase as the precursors enables controllable design of LTCC materials. As the result, through systematic investigation presented in this thesis, we have developed five LTCC materials with tuneable dielectric constant in the range of 4-12. These materials show dielectric loss below 0.003 and resistivity above 10^12 ohm centimeter. The thermal expansion property is also adjusted to be in the acceptable range to match with the silicon, alumina substrates or printed circuit board. All designed LTCC materials can be co-fired with silver electrode at the temperature range of 850-900oC without any internal diffusion. Also industrial trial has been conducted by industrial collaboration partner which confirmed the validation of these LTCC materials

Development and Packaging of Microsystems Using Foundry Services

Micro-electro-mechanical systems (MEMS) are a new and rapidly growing field of research. Several advances to the MEMS state of the art were achieved through design and characterization of novel devices. Empirical and theoretical model of polysilicon thermal actuators were developed to understand their behavior. The most extensive investigation of the Multi-User MEMS Processes (MUMPs) polysilicon resistivity was also performed. The first published value for the thermal coefficient of resistivity (TCR) of the MUMPs Poly 1 layer was determined as 1.25 x 10(exp -3)/K. The sheet resistance of the MUMPs polysilicon layers was found to be dependent on linewidth due to presence or absence of lateral phosphorus diffusion. The functional integration of MEMS with CMOS was demonstrated through the design of automated positioning and assembly systems, and a new power averaging scheme was devised. Packaging of MEMS using foundry multichip modules (MCMs) was shown to be a feasible approach to physical integration of MEMS with microelectronics. MEMS test die were packaged using Micro Module Systems MCM-D and General Electric High Density Intercounect and Chip-on-Flex MCM foundries. Xenon difluoride (XeF2) was found to be an excellent post-packaging etchant for bulk micromachined MEMS. For surface micromachining, hydrofluoric acid (HF) can be used

Marshall Space Flight Center Research and Technology Report 2018

Many of NASAs missions would not be possible if it were not for the investments made in research advancements and technology development efforts. The technologies developed at Marshall Space Flight Center contribute to NASAs strategic array of missions through technology development and accomplishments. The scientists, researchers, and technologists of Marshall Space Flight Center who are working these enabling technology efforts are facilitating NASAs ability to fulfill the ambitious goals of innovation, exploration, and discovery

Glass multilayer bonding for high density interconnect substrates

The aim of this research was the investigation of bonding borosilicate glass sheets, its trade mark CMZ, 100μm thickness, to create multilayer substrates capable of supporting high-density electrical interconnections. CMZ glass was chosen as it has a coefficient of thermal expansion that is close to that of silicon, thereby minimising thermal stresses in assemblies generated by manufacturing processes or service conditions. Two different methods of bonding the glass were used in this study; pressure assisted low temperature bonding (PALTB), and water glass bonding, using Sodium Trisilicate (Na2Si3O7) solution. These two bonding methods have already been applied in electronics manufacturing applications, such as silicon wafer bonding and multichip modules (MCMs). However, glass-to-glass bonding is a relatively new subject and this study is an attempt to standardise bonding processes. Additionally, the concept of using glass as a multilayer substrate provides a foundation for further exploration by other investigators. Initial tests that were carried out before standardising the procedures for these two methods showed that a two-stage bonding process provided optimum results. A preliminary stage commenced by placing the cleaned (using Decon 90 solution) samples in a vacuum oven for 15 minutes, then heating at 100oC for 1hr. The permanent stage was then achieved by heating the samples in a conventional oven at temperatures from 200 to 400oC, for different periods. At this stage, the main difference between the two methods was the application of pressure (1-2MPa) during heating of the PALTB samples. To evaluate the quality of the bonds, qualitative tests such as visual, optical microscope and dye penetrant were used. In addition, to estimate the strength and the rigidity of the interlayer bonds, two quantitative tests, comprising of deflection under cyclic stresses and crack opening were used. Thermal cycling and humidity tests were also used to assess resistance of the bonds to environmental effects. The results showed that heating to 100oC was insufficient to enhance the bonds, as occasionally a sudden increase of deflection was observed indicating slippage/delamination. These bonds were enhanced during the permanent bonding stage by heating to 300oC in PALTB, under a pressure of 1-2MPa. The crack-opening test showed that the delamination distances of the bonds in the permanent stage were lower than that for preliminary bonding in both bonding methods. The delamination distances from the crack opening tests were used to calculate the strain energy release rate (GIC) and fracture toughness (KIC) values of the interlayers. The results showed that the KIC values of the permanent PALTB and water glass interlayers were higher than 1MPa.m0.5, while the KIC value of the CMZ glass, determined by linear elastic fracture mechanics, was around 0.8MPa.m0.5. The optical observations revealed that the prepared bonded sheets did not delaminate or break after thermal cycling and humidity tests

Sintering Applications

Sintering is one of the final stages of ceramics fabrication and is used to increase the strength of the compacted material. In the Sintering of Ceramics section, the fabrication of electronic ceramics and glass-ceramics were presented. Especially dielectric properties were focused on. In other chapters, sintering behaviour of ceramic tiles and nano-alumina were investigated. Apart from oxides, the sintering of non-oxide ceramics was examined. Sintering the metals in a controlled atmosphere furnace aims to bond the particles together metallurgically. In the Sintering of Metals section, two sections dealt with copper containing structures. The sintering of titanium alloys is another topic focused in this section. The chapter on lead and zinc covers the sintering in the field of extractive metallurgy. Finally two more chapter focus on the basics of sintering,i.e viscous flow and spark plasma sintering

Multifunctional vertical interconnections of multilayered flexible substrates for miniaturised POCT devices

Point-of-care testing (POCT) is an emerging technology which can lead to an eruptive change of lifestyle and medication of population against the traditional medical laboratory. Since living organisms are intrinsically flexible and malleable, the flexible substrate is a necessity for successful integration of electronics in biological systems that do not cause discomfort during prolonged use. Isotropic conductive adhesives (ICAs) are attractive to wearable POCT devices because ICAs are environmentally friendly and allow a lower processing temperature than soldering which protects heat-sensitive components. Vertical interconnections and optical interconnections are considered as the technologies to realise the miniaturised high-performance devices for the future applications. This thesis focused on the multifunctional integration to enable both electrical and optical vertical interconnections through one via hole that can be fabricated in flexible substrates. The functional properties of the via and their response to the external loadings which are likely encountered in the POCT devices are the primary concerns of this PhD project. In this thesis, the research of curing effect on via performance was first conducted by studying the relationship between curing conditions and material properties. Based on differential scanning calorimetry (DSC) analysis results, two-parameter autocatalytic model (Sestak-Berggren model) was established as the most suitable curing process description of our typical ICA composed of epoxy-based binders and Ag filler particles. A link between curing conditions and the mechanical properties of ICAs was established based on the DMA experiments. A series of test vehicles containing vias filled with ICAs were cured under varying conditions. The electrical resistance of the ICA filled vias were measured before testing and in real time during thermal cycling tests, damp heat tests and bending tests. A simplified model was derived to represent rivet-shaped vias in the flexible printed circuit boards (FPCBs) based on the assumption of homogenous ICAs. An equation was thus proposed to evaluate the resistance of the model. Vias with different cap sizes were also tested, and the equation was validated. Those samples were divided into three groups for thermal cycling test, damp heat ageing test and bending test. Finite element analysis (FEA) was used to aid better understanding of the electrical conduction mechanisms. Based on theoretical equation and simulation model, the fistula-shape ICA via was fabricated in flexible PCB. Its hollow nature provides the space for integrations of optical or fluidic circuits. Resistance measurements and reliability tests proved that carefully designed and manufactured small bores in vias did not comprise the performance. Test vehicles with optoelectrical vias were made through two different approaches to prove the feasibility of multifunctional vertical interconnections in flexible substrates. A case study was carried out on reflection Photoplethysmography (rPPG) sensors manufacturing, using a specially designed optoelectronic system. ICA-based low-temperature manufacture processes were developed to enable the integration of these flexible but delicate substrates and components. In the manufacturing routes, a modified stencil printing setup, which merges two printing-curing steps (vias forming and components bonding) into one step, was developed to save both time and energy. The assembled probes showed the outstanding performance in functional and physiological tests. The results from this thesis are anticipated to facilitate the understanding of ICA via conduction mechanism and provide an applicable tool to optimise the design and manufacturing of optoelectrical vias

Application of PEEC modeling for the development of a novel multi-gigahertz test interface with fine pitch wafer level package

Ph.DDOCTOR OF PHILOSOPH