265 research outputs found
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Silicon compilation
Silicon compilation is a term used for many different purposes. In this paper we define silicon compilation as a mapping from some higher level description into layout. We define the basic issues in structural and behavioral silicon compilation and some possible solutions to those issues. Finally, we define the concept of an intelligent silicon compiler in which the compiler evaluates the quality of the generated design and attempts to improve it if it is not satisfactory
Custom Integrated Circuits
Contains reports on twelve research projects.Analog Devices, Inc.International Business Machines, Inc.Joint Services Electronics Program (Contract DAAL03-86-K-0002)Joint Services Electronics Program (Contract DAAL03-89-C-0001)U.S. Air Force - Office of Scientific Research (Grant AFOSR 86-0164)Rockwell International CorporationOKI Semiconductor, Inc.U.S. Navy - Office of Naval Research (Contract N00014-81-K-0742)Charles Stark Draper LaboratoryNational Science Foundation (Grant MIP 84-07285)National Science Foundation (Grant MIP 87-14969)Battelle LaboratoriesNational Science Foundation (Grant MIP 88-14612)DuPont CorporationDefense Advanced Research Projects Agency/U.S. Navy - Office of Naval Research (Contract N00014-87-K-0825)American Telephone and TelegraphDigital Equipment CorporationNational Science Foundation (Grant MIP-88-58764
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Chippe : a system for constraint driven behavioral synthesis
This report describes the Chippe system, gives some background previous work and describes several sample design runs of the system. Also presented are the sources of the design tradeoffs used by Chippe, and overview of the internal design model, and experiences using the system
Algorithm to layout (ATL) systems for VLSI design
PhD ThesisThe complexities involved in custom VLSI design together with the
failure of CAD techniques to keep pace with advances in the fabrication
technology have resulted in a design bottleneck. Powerful tools are
required to exploit the processing potential offered by the densities now
available. Describing a system in a high level algorithmic notation
makes writing, understanding, modification, and verification of a design
description easier. It also removes some of the emphasis on the physical
issues of VLSI design, and focus attention on formulating a correct and
well structured design. This thesis examines how current trends in CAD
techniques might influence the evolution of advanced Algorithm To Layout
(ATL) systems. The envisaged features of an example system are
specified. Particular attention is given to the implementation of one
its features COPTS (Compilation Of Occam Programs To Schematics).
COPTS is capable of generating schematic diagrams from which an
actual layout can be derived. It takes a description written in a subset
of Occam and generates a high level schematic diagram depicting its
realisation as a VLSI system. This diagram provides the designer with
feedback on the relative placement and interconnection of the operators
used in the source code. It also gives a visual representation of the
parallelism defined in the Occam description. Such diagrams are a
valuable aid in documenting the implementation of a design.
Occam has also been selected as the input to the design system that
COPTS is a feature of. The choice of Occam was made on the assumption
that the most appropriate algorithmic notation for such a design system
will be a suitable high level programming language. This is in contrast
to current automated VLSI design systems, which typically use a hardware
des~ription language for input. These special purpose languages
currently concentrate on handling structural/behavioural information and
have limited ability to express algorithms. Using a language such as
Occam allows a designer to write a behavioural description which can be
compiled and executed as a simulator, or prototype, of the system. The
programmability introduced into the design process enables designers to
concentrate on a design's underlying algorithm. The choice of this
algorithm is the most crucial decision since it determines the
performance and area of the silicon implementation.
The thesis is divided into four sections, each of several chapters.
The first section considers VLSI design complexity, compares the expert
systems and silicon compilation approaches to tackling it, and examines
its parallels with software complexity. The second section reviews the
advantages of using a conventional programming language for VLSI system
descriptions. A number of alternative high level programming languages
are considered for application in VLSI design. The third section defines
the overall ATL system COPTS is envisaged to be part of, and considers
the schematic representation of Occam programs. The final section
presents a summary of the overall project and suggestions for future work
on realising the full ATL system
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