A trade-off design of microstrip broadband power amplifier for UHF applications

In this paper, the design of a Broadband Power Amplifier for UHF applications is presented. The proposed BPA is based on ATF13876 Agilent active device. The biasing and matching networks both are implemented by using microstrip transmission lines. The input and output matching circuits are designed by combining two broadband matching techniques: a binomial multi-section quarter wave impedance transformer and an approximate transformation of previously designed lumped elements. The proposed BPA shows excellent performances in terms of impedance matching, power gain and unconditionally stability over the operating bandwidth ranging from 1.2 GHz to 3.3 GHz. At 2.2 GHz, the large signal simulation shows a saturated output power of 18.875 dBm with an output 1-dB compression point of 6.5 dBm of input level and a maximum PAE of 36.26%

Design of L-S band broadband power amplifier using microstip lines

This contribution introduces a novel broadband power amplifier design, operating in the frequency band ranging from 1.5 GHz to 3 GHz which cover the mainstream applications running in L and S bands. Both matching and biasing networks are synthesized by using microstrip transmission lines. In order to provide a wide bandwidth, two broadband matching techniques are deployed for this purpose, the first technique is an approximate transformation of a previously designed lumped elements matching networks into microstrip matching circuits, and the second technique is a binomial multi-sections quarter wave impedance transformer. The proposed work is based on ATF-13786 active device. The simulation results depict a maximum power gain of 16.40 dB with an excellent input and output matching across 1.5 GHz ~ 3 GHz. At 2.2 GHz, the introduced BPA achieves a saturated output power of 16.26 dBm with a PAE of 21.74%, and a 1-dB compression point of 4.5 dBm input power level. The whole circuitry is unconditionally stable over the overall bandwidth. By considering the broadband matching, the proposed design compares positively with the most recently published BPA

HIGH LINEARITY UNIVERSAL LNA DESIGNS FOR NEXT GENERATION WIRELESS APPLICATIONS

Design of the next generation (4G) systems is one of the most active and important area of research and development in wireless communications. The 2G and 3G technologies will still co-exist with the 4G for a certain period of time. Other applications such as wireless LAN (Local Area Network) and RFID are also widely used. As a result, there emerges a trend towards integrating multiple wireless functionalities into a single mobile device. Low noise amplifier (LNA), the most critical component of the receiver front-end, determines the sensitivity and noise figure of the receiver and is indispensable for the complete system. To satisfy the need for higher performance and diversity of wireless communication systems, three LNAs with different structures and techniques are proposed in the thesis based on the 4G applications. The first LNA is designed and optimized specifically for LTE applications, which could be easily added to the existing system to support different standards. In this cascode LNA, the nonlinearity coming from the common source (CS) and common gate (CG) stages are analyzed in detail, and a novel linear structure is proposed to enhance the linearity in a relatively wide bandwidth. The LNA has a bandwidth of 900MHz with the linearity of greater than 7.5dBm at the central frequency of 1.2GHz. Testing results show that the proposed structure effectively increases and maintains linearity of the LNA in a wide bandwidth. However, a broadband LNA that covers multiple frequency ranges appears more attractive due to system simplicity and low cost. The second design, a wideband LNA, is proposed to cover multiple wireless standards, such as LTE, RFID, GSM, and CDMA. A novel input-matching network is proposed to relax the tradeoff among noise figure and bandwidth. A high gain (>10dB) in a wide frequency range (1-3GHz) and a minimum NF of 2.5dB are achieved. The LNA consumes only 7mW on a 1.2V supply. The first and second LNAs are designed mainly for the LTE standard because it is the most widely used standard in the 4G communication systems. However, WiMAX, another 4G standard, is also being widely used in many applications. The third design targets on covering both the LTE and the WiMAX. An improved noise cancelling technique with gain enhancing structure is proposed in this design and the bandwidth is enlarged to 8GHz. In this frequency range, a maximum power gain of 14.5dB and a NF of 2.6-4.3dB are achieved. The core area of this LNA is 0.46x0.67mm2 and it consumes 17mW from a 1.2V supply. The three designs in the thesis work are proposed for the multi-standard applications based on the realization of the 4G technologies. The performance tradeoff among noise, linearity, and broadband impedance matching are explored and three new techniques are proposed for the tradeoff relaxation. The measurement results indicate the techniques effectively extend the bandwidth and suppress the increase of the NF and nonlinearity at high frequencies. The three proposed structures can be easily applied to the wideband and multi-standard LNA design

Ultra Low Power IEEE 802.15.4/ZIGBEE Compliant Transceiver

Low power wireless communications is the most demanding request among all wireless users. A battery life that can survive for years without being replaced, makes it realistic to implement many applications where the battery is unreachable (e.g. concrete walls) or expensive to change (e.g underground applications). IEEE 802.15.4/ZIGBEE standard is published to cover low power low cost applications, where the battery life can last for years, because of the 1% duty cycle of operation. A fully integrated 2.4GHz IEEE802.15.4 Compliant transceiver suitable for low power, low cost ZIGBEE applications is implemented. Direct conversion architecture is used in both Receiver and Transmitter, to achieve the minimum possible power and area. The chip is fabricated in a standard 0.18um CMOS technology. In the transmit mode, the transmitter chain (Modulator to PA) consumes 25mW, while in the receive mode, the iv receiver chain (LNA to Demodulator) consumes 5mW. The Integer-N Frequency Synthesizer consumes 8.5mW. Other Low power circuits are reported; A 13.56 Passive RFID tag and a low power ADC suitable for Built-In-Testing applications