A W-Band SPDT Switch with 15 dBm P1dB in 55-nm Bulk CMOS

© 2022 IEEE -This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/LMWC.2022.3159529Power-handling capability of bulk CMOS-based single-pole double-throw switch operating in millimetre-wave and sub-THz region is significantly limited by the reduced threshold voltage of deeply scaled transistors. A unique design technique based on impedance transformation network is presented in this work, which improves 1-dB compression point, namely P1dB, without deteriorating other performance. To prove the presented solution is valid, a 70-100 GHz switch is designed and implemented in a 55-nm bulk CMOS technology. At 90 GHz, it achieves a measured P1dB of 15 dBm, an insertion loss of 3.5 dB and an isolation of 18 dB. The total area of the chip is only 0.14 mm2.Peer reviewe

Miniaturized Resonator and Bandpass Filter for Silicon-Based Monolithic Microwave and Millimeter-Wave Integrated Circuits

© 2018 IEEE. © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.This paper introduces a unique approach for the implementation of a miniaturized on-chip resonator and its application for the first-order bandpass filter (BPF) design. This approach utilizes a combination of a broadside-coupling technique and a split-ring structure. To fully understand the principle behind it, simplified LC equivalent-circuit models are provided. By analyzing these models, guidelines for implementation of an ultra-compact resonator and a BPF are given. To further demonstrate the feasibility of using this approach in practice, both the implemented resonator and the filter are fabricated in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that the resonator can generate a resonance at 66.75 GHz, while the BPF has a center frequency at 40 GHz and an insertion loss of 1.7 dB. The chip size of both the resonator and the BPF, excluding the pads, is only 0.012mm 2 (0.08 × 0.144 mm 2).Peer reviewe

An ultra-wideband SiGe BiCMOS LNA for w-band applications

This article presents the design steps and implementation of a W-band ultra-wideband low noise amplifier (LNA) for both automotive and imaging applications. Three amplifiers based on common-emitter topology with different configurations are manufactured using IHP 0.13 mu m SiGe BiCMOS 300/500 GHz (f(t)/f(max)) SG13G2 technology. A three-stage single-ended structure is proposed for ultra-wideband imaging purposes. As the results are analyzed, this 0.2 mm(2) LNA can operate in a 25 GHz of measured 3-dB bandwidth in W-band with 21 dB peak gain and 4.9 dB average noise figure using 1.5 V supply voltage. It consumes 50 mW of power in the edge operation conditions and the output 1 dB compression point is found as -4 dBm. To the authors' knowledge, this chip achieves one of the best overall performances compared to other W-band LNAs

A 90-GHz Asymmetrical Single-Pole Double-Throw Switch with >19.5-dBm 1-dB Compression Point in Transmission Mode Using 55-nm Bulk CMOS Technology

© Copyright 2021 IEEE. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/TCSI.2021.3106231The millimeter-wave (mm-wave) single-pole double-throw (SPDT) switch designed in bulk CMOS technology has limited power-handling capability in terms of 1-dB compression point (P1dB) inherently. This is mainly due to the low threshold voltage of the switching transistors used for shunt-connected configuration. To solve this issue, an innovative approach is presented in this work, which utilizes a unique passive ring structure. It allows a relatively strong RF signal passing through the TX branch, while the switching transistors are turned on. Thus, the fundamental limitation for P1dB due to reduced threshold voltage is overcome. To prove the presented approach is feasible in practice, a 90-GHz asymmetrical SPDT switch is designed in a standard 55-nm bulk CMOS technology. The design has achieved an insertion loss of 3.2 dB and 3.6 dB in TX and RX mode, respectively. Moreover, more than 20 dB isolation is obtained in both modes. Because of using the proposed passive ring structure, a remarkable P1dB is achieved. No gain compression is observed at all, while a 19.5 dBm input power is injected into the TX branch of the designed SPDT switch. The die area of this design is only 0.26 mm2.Peer reviewe

High-Resolution Radiometer for Remote Sensing of Solar Flare Activity from Low Earth Orbit Satellites

This article has been withdrawn at the request of the author(s) and/or editor. The Publisher apologizes for any inconvenience this may cause.For this Article Withdrawal Statement, please click on: https://ojs.bilpublishing.com/index.php/jasr/article/view/621Abstract: Solar flares, intense bursts of radiation, can disrupt the atmosphere and potentially affect communication, navigation and electrical systems. A newly developed miniaturised microwave radiometer used on a space-borne platform should offer astronomers unprecedented understanding of the largest explosive phenomena in our solar system. In this paper the activity and results of the EU funded research project FLARES are presented. Objective of FLARES has been the study, analysis and design of millimetre-wave (mm-wave) system-on-chip (SoC) radiometer for space-borne detection of solar flares. The proposed approach has contributed to reduce significantly the power consumption and weight with respect to the existing instruments for the observation and study of solar flares. In particular, the proposed SoC Dicke radiometer can achieve one order of magnitude improvement in terms of resolution, so allowing the detection of solar flares with relatively low intensity, i.e. about 100 times lower than those currently detected by the existing systems, owing to space-borne operations and the microchip-level miniaturization through silicon technology under space qualification

Comparison of microstrip w-band detectors based on zero bias schottky-diodes

This paper presents and discusses three different low-cost microstrip implementations of Schottky-diode detectors in W Band, based on the use of the Zero Bias Diode (ZBD) from VDI (Virginia Diodes, Charlottesville, VA, USA). Designs are based on a previous work of modeling of the ZBD diode. Designs also feature low-cost, easy-to-use tooling substrates (RT Duroid 5880, 5 mils thickness) and even low-cost discrete SMD components such as SOTA resistances (State Of The Art TM miniaturized surface mount resistors), which are modeled to be used well above commercial frequency margins. Intensive use of 3D EM simulation tools such as HFSS TM is done to support microstrip board modeling. Measurements of the three designs fabricated are compared to simulations and discussed.The authors would like to thank the funding of the University of Cantabria Industrial Doctorate programme 2014, project: “Estudio y Desarrollo de Tecnologías para Sistemas de Telecomunicación a Frecuencias Milimétricas y de Terahercios con Aplicación a Sistemas de Imaging en la Banda 90 GHz–100GHz” and the Spanish Ministry of Economy, Science and Innovation for the financial support provided through projects CONSOLIDER-INGENIO CSD2008-00068 (TERASENSE), the continuing excellence network SPATEK and the projects TEC2014-58341-C4-1-R, TEC2017-83343-C4-1-R. and AYA2017-92153-EXP

SiGe BiCMOS active phase shifter design for W-band automotive radar applications

In this thesis, the design and measurement results of the fabricated LNA and phase shifter chips to be utilized in W-band Automotive Radar Applications are presented. The chips are manufactured using 0.13μm and 0.25μm SiGe HBT technologies. Observing the high insertion loss of the fabricated 4-bit MEMS based digital phase shifter which is around 15.3-18.1dB, two active phase shifter designs based on different vector-modulator topologies are offered. Amongst these structures, three-way active phase shifter is composed of Wilkinson power divider/combiner which separates the input signal into three vectors, additional phase lines dividing the 360o phase spectrum into three regions by adding 120o consecutive phase to each vector and LNAs to rotate the main antenna beam in these regions by the weighted sum of vectors. According to measurement results of the 100mW consuming 1.65mm2-sized chip, continuous 360o phase shifting is clearly achieved with 11dB peak gain at 77GHz, no insertion loss up to 90GHz and return losses better than 10dB for all the phase states. On the other hand, a two way I/Q type MEMS based active phase shifter is also in fabrication. The continuous phase shifting is realized in I- and Q-separated two amplification stages, using weighted sum method, to rotate in a single 90o quadrant and then employs 1-bit (0o-180o) MEMS phase shifter blocks to cover 360o in 4 states by shifting this quadrant about 90o. The simulation results of 3.74mm2 chip point out above-15dB input/output return loss and a variable 3-7.5dB gain at 77GHz with the tuned LNA voltages. Using these active phase shifters, phased array radars could provide higher gain in a smaller die area with reduced cost due to the used SiGe technology and automotive radars with high perfromances could be achieved

ANALYSIS AND DESIGN OF SILICON-BASED MILLIMETER-WAVE AMPLIFIERS

Ph.DDOCTOR OF PHILOSOPH

MILLIMETER-WAVE QUADRATURE RECEIVERS FOR ATMOSPHERIC SENSING AND RADIOMETRY

The objective of this research is to investigate the design challenges of millimeter wave (mm-wave) quadrature receivers for emerging applications and develop new ideas to ad- dress these challenges. Next-generation wireless networks, satellite communications, atmospheric sensing instruments, autonomous vehicle radars, and body scanners are targeting to operate at mm-wave frequencies, and high-performance electronics are needed to enable these technologies. In this research, we investigate novel circuit topologies to improve the performance of existing mm-wave quadrature receivers, particularly for radiometry and remote sensing applications. A transformer-based front-end switch is co- designed with an LNA where the transformer acts as the input matching network of the LNA, reducing the front-end loss and system noise figure. Broadband and low-loss quadrature signal generation networks are proposed to provide highly balanced quadrature signals to reject the image frequency content. In addition, a high-efficiency frequency multiplier topology is demonstrated, achieving superior performance compared to the state-of-the-art designs. Lastly, the reliability and noise performance of on-chip noise source devices (PN junctions) in a SiGe BiCMOS platform was characterized and compared. To confirm the advantages of our ideas, the measurement and simulation results of all fabricated circuits are presented and discussed.Ph.D

W/D-Bands single-chip systems in a 0.13μm SiGe BiCMOS technology-dicke radiometer, and frequency extension module for VNAs

Recent advances in silicon-based process technologies have enabled to build low-cost and fully-integrated single-chip millimeter-wave systems with a competitive, sometimes even better, performance with respect to III-V counterparts. As a result of these developments and the increasing demand for the applications in the millimeter-wave frequency range, there is a growing research interest in the field of the design and implementation of the millimeter-wave systems in the recent years. In this thesis, we present two single-chip D-band front-end receivers for passive imaging systems and a single-chip W-band frequency extension module for VNAs, which are implemented in IHP’s 0.13μm SiGe BiCMOS technology, SG13G2, featuring HBTs with ft/fmax of 300GHz/500GHz. First, the designs, implementations, and measurement results of the sub-blocks of the radiometers, which are SPDT switch, low-noise amplifier (LNA), and power detector, are presented. Then, the implementation and experimental test results of the total power and Dicke radiometers are demonstrated. The total power radiometer has a noise equivalent temperature difference (NETD) of 0.11K, assuming an external calibration technique. In addition, the dependence of the NETD of the total power radiometer upon the gain-fluctuation is demonstrated. The NETD of the total power radiometer is 1.3K assuming a gain-fluctuation of %0.1. The front-end receiver of the total power radiometer occupies an area of 1.3 mm2. The Dicke radiometer achieves an NETD of 0.13K, for a Dicke switching of 10 kHz, and its total chip area is about 1.7 mm2. The quiescent power consumptions of the total power and Dicke radiometers are 28.5 mW and 33.8 mW, respectively. The implemented radiometers show the lowest NETD in the literature and the Dicke switching concept is employed for the first time beyond 100 GHz. Second, we present the design methodologies, implementation methods, and results of the sub-blocks of the frequency extension module, such as down-conversion mixer, frequency quadrupler, buffer amplifier, Wilkinson power divider, and dual-directional coupler. Later, the implementation, characterization and experimental test results of the single-chip frequency extension module are demonstrated. The frequency extension module has a dynamic range of about 110 dB, for an IF resolution bandwidth of 10 Hz, with an output power which varies between -4.25 dBm and -0.3 dBm over the W-band. It has an input referred 1-dB compression point of about 1.9 dBm. The directivity of the frequency extension module is better than 10 dB along the entire W-band, and its maximum value is approximately 23 dB at around 75.5 GHz. Finally, the measured s-parameters of a W-band horn-antenna, which are performed by either the designed frequency extension module and a commercial one, are compared. This study is the first demonstration of a single-chip frequency extension module in a silicon-based semiconductor technology