The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

Reliability Enhancing Control Algorithms for Two-Stage Grid-Tied Inverters

In the photovoltaic (PV) generation system, two types of grid-tied inverter systems are usually deployed: the single-stage grid-tied inverter system and the two-stage grid-tied inverter system. In the single-stage grid-tied inverter system, the input of the inverter is directly connected to the PV arrays, while an additional dc-dc stage is inserted between the PV arrays and the dc-ac inverter in the two-stage design. The additional dc-dc stage could provide a stable dc-link voltage to the inverter, which also enables new design possibilities, including the multi-MPPT operation and solar-plus-storage application. Thus, the two-stage grid-tied inverter has been widely used in the PV generation system.As the core component of the PV generation system, the reliability of the grid-tied inverter determines the overall robustness of the system. The two-stage grid-tied inverter system includes three parts: the dc-dc stage, dc-link capacitor, and dc-ac inverter. Thus, the reliability of the two-stage grid-tied inverter relies on the reliability of each part. The dc-dc stage is used to provide a stable dc-link voltage to the inverter. However, when the inverter stage provides constant power to the grid, the load of the dc-dc stage becomes the constant power load (CPL), which will deteriorate the stability of the dc-dc stage. The dc-link capacitor is used to attenuate the voltage ripple on the dc-link and balance the transient power mismatch between the dc-dc stage and the dc-ac stage. However, during the operation of the inverter system, the degradation of the capacitor will reduce the converter reliability, and even result in system failure. The inverter stage is connected to the grid through the output filter, and the LCL type filter has been commonly used due to its superior performance. The resonance of the LCL filter must be properly damped to enhance the inverter stability. However, the grid-side impedance will lead to the resonant frequency drifting of the LCL filter, which will worsen the stability margin of the inverter. Thus, the control design of the two-stage grid-tied inverter system must consider those reliability challenges. In this work, three control algorithms are proposed to solve the reliability challenges. For the dc-dc stage, an uncertainty and disturbance estimator (UDE) based robust voltage control scheme is proposed. The proposed voltage control scheme can actively estimate and compensate for the disturbance of the dc-dc stage. Both the disturbance rejection performance and the stability margin of the dc-dc stage, especially under the CPL, could be enhanced. For the dc-link capacitor, a high-frequency (HF) signal injection based capacitance estimation scheme is proposed. The proposed estimation scheme can monitor the actual dc-link capacitance in real-time. For the inverter stage, an adaptive extremum seeking control (AESC) based LCL filter resonant frequency estimation scheme is proposed. The AESC-based estimation scheme can estimate the resonant frequency of the LCL filter online. All the proposed reliability enhancing control algorithms could enhance the reliability of the two-stage grid-tied inverter system. Detailed theoretical analysis, simulation studies, and comprehensive experimental studies have been performed to validate the effectiveness

Reliability Enhancing Control Algorithms for Two-Stage Grid-Tied Inverters

In the photovoltaic (PV) generation system, two types of grid-tied inverter systems are usually deployed: the single-stage grid-tied inverter system and the two-stage grid-tied inverter system. In the single-stage grid-tied inverter system, the input of the inverter is directly connected to the PV arrays, while an additional dc-dc stage is inserted between the PV arrays and the dc-ac inverter in the two-stage design. The additional dc-dc stage could provide a stable dc-link voltage to the inverter, which also enables new design possibilities, including the multi-MPPT operation and solar-plus-storage application. Thus, the two-stage grid-tied inverter has been widely used in the PV generation system.As the core component of the PV generation system, the reliability of the grid-tied inverter determines the overall robustness of the system. The two-stage grid-tied inverter system includes three parts: the dc-dc stage, dc-link capacitor, and dc-ac inverter. Thus, the reliability of the two-stage grid-tied inverter relies on the reliability of each part. The dc-dc stage is used to provide a stable dc-link voltage to the inverter. However, when the inverter stage provides constant power to the grid, the load of the dc-dc stage becomes the constant power load (CPL), which will deteriorate the stability of the dc-dc stage. The dc-link capacitor is used to attenuate the voltage ripple on the dc-link and balance the transient power mismatch between the dc-dc stage and the dc-ac stage. However, during the operation of the inverter system, the degradation of the capacitor will reduce the converter reliability, and even result in system failure. The inverter stage is connected to the grid through the output filter, and the LCL type filter has been commonly used due to its superior performance. The resonance of the LCL filter must be properly damped to enhance the inverter stability. However, the grid-side impedance will lead to the resonant frequency drifting of the LCL filter, which will worsen the stability margin of the inverter. Thus, the control design of the two-stage grid-tied inverter system must consider those reliability challenges. In this work, three control algorithms are proposed to solve the reliability challenges. For the dc-dc stage, an uncertainty and disturbance estimator (UDE) based robust voltage control scheme is proposed. The proposed voltage control scheme can actively estimate and compensate for the disturbance of the dc-dc stage. Both the disturbance rejection performance and the stability margin of the dc-dc stage, especially under the CPL, could be enhanced. For the dc-link capacitor, a high-frequency (HF) signal injection based capacitance estimation scheme is proposed. The proposed estimation scheme can monitor the actual dc-link capacitance in real-time. For the inverter stage, an adaptive extremum seeking control (AESC) based LCL filter resonant frequency estimation scheme is proposed. The AESC-based estimation scheme can estimate the resonant frequency of the LCL filter online. All the proposed reliability enhancing control algorithms could enhance the reliability of the two-stage grid-tied inverter system. Detailed theoretical analysis, simulation studies, and comprehensive experimental studies have been performed to validate the effectiveness

Analysis and design of a modular multilevel converter with trapezoidal modulation for medium and high voltage DC-DC transformers

Conventional dual active bridge topologies provide galvanic isolation and soft-switching over a reasonable operating range without dedicated resonant circuits. However, scaling the two-level dual active bridge to higher dc voltage levels is impeded by several challenges among which the high dv/dt stress on the coupling transformer insulation. Gating and thermal characteristics of series switch arrays add to the limitations. To avoid the use of standard bulky modular multilevel bridges, this paper analyzes an alternative modulation technique where staircase approximated trapezoidal voltage waveforms are produced; thus alleviating developed dv/dt stresses. Modular design is realized by the utilization of half-bridge chopper cells. Therefore, the analyzed converter is a modular multi-level converter operated in a new mode with no common-mode dc arm currents as well as reduced capacitor size, hence reduced cell footprint. Suitable switching patterns are developed and various design and operation aspects are studied. Soft switching characteristics will be shown to be comparable to those of the two-level dual active bridge. Experimental results from a scaled test rig validate the presented concept

Grid Integration of DC Buildings: Standards, Requirements and Power Converter Topologies

Residential dc microgrids and nanogrids are the emerging technology that is aimed to promote the transition to energy-efficient buildings and provide simple, highly flexible integration of renewables, storages, and loads. At the same time, the mass acceptance of dc buildings is slowed down by the relative immaturity of the dc technology, lack of standardization and general awareness about its potential. Additional efforts from multiple directions are necessary to promote this technology and increase its market attractiveness. In the near-term, it is highly likely that the dc buildings will be connected to the conventional ac distribution grid by a front-end ac-dc converter that provides all the necessary protection and desired functionality. At the same time, the corresponding requirements for this converter have not been yet consolidated. To address this, present paper focuses on various aspects of the integration of dc buildings and includes analysis of related standards, directives, operational and compatibility requirements as well as classification of voltage levels. In addition, power converter configurations and modulation methods are analyzed and compared. A classification of topologies that can provide the required functionality for the application is proposed. Finally, future trends and remaining challenges pointed out to motivate new contributions to this topic

Single phase grid tie inverter for solar PV panels with active power decoupling circuit

textDistributed energy resources like solar power (PV Panels) are usually connected to the AC grid through a single phase voltage source inverter (VSI). The major drawback associated with single phase grid tie inverters is the double frequency component of the grid that appears on the DC bus link. Large electrolytic capacitors are generally employed in the inverters to eliminate the ripple component. However, their bulkiness and relatively short lifetime are motivational factors to replace them with small film capacitors. This paper presents a synchronous boost/buck based active power decoupling circuit in parallel with the dc-bus link capacitor and discusses the different types of control strategies implemented. Simulation results are presented for each control technique and it is shown that the ripple on the DC bus link is largely reduced due to inclusion of this circuit along with an expected extension of the lifetime due to the reduction in the amount of dc-bus capacitance used.Electrical and Computer Engineerin

The presentation of sustainable power source assets in the field of intensity age assumes an imperative job

DC to DC converters to interface lesser-voltage higher-control supply to the essential stock shows the most raised proficiency was practiced in the full-connect converter. Non-separated converters bury unified inductor help converters with essential voltage gain and furthermore converters hold lesser profitability, yet they huge in structure, even the quantity of latent parts is diminished. In like manner gives proficient utilization of semiconductor switches, have higher voltage yield and are prepared to work in lesser estimation of D interestingly with every single disconnected converter. High addition topologies are regularly outfitted with high voltage security structures. Few non-disengaged topologies gives voltage hang security circuits are pointless since capacitive fragments and circuit plan are progressed to work under higher information voltage and low power. That requires lesser qualities for convincing RAC obstruction and entomb partnered inductance dispersal to achieve more prominent adequacy of intensity change. Larger supply current needs extensive region of core area inter allied inductors

High power density AC to DC conversion with reduced input current harmonics

PhD ThesisThis thesis investigates the bene ts and challenges arising from the use of minimal capacitance in AC to DC converters. The purpose of the research is to ultimately improve the power density and power factor of electrical systems connected to the grid. This is carried out in the con- text of a low cost brushless DC drive system operating from an o ine power supply. The work begins with a review of existing applications where it is prac- tical to use a limited amount of DC link capacitance. The vast majority of these have a load which is insensitive to supply power variations at twice the line frequency. Low performance motor drives are found to be the most prevalent, with the inertia of the rotor mitigating the e ect of torque ripple. Further research is carried out on active power factor cor- rection techniques suitable for this application, leading to the conclusion that no appropriate systems exist. A power supply is developed to enable a 24V, 200W brushless motor drive to operate from the mains. The system runs successfully using only 1µF of DC link capacitance, which causes the motor supply volt- age to have 100% ripple. It is noted that whilst this drastically reduces the low frequency input current harmonics, those occurring at the load switching frequency are greatly increased. To combat this, a novel active power factor correction system is proposed using a notch lter to detect the input current error. The common problem of voltage feedback ripple is avoided by eliminating the voltage control loop altogether. The main limitations are identi ed as a high sensitivity to load step changes and variations in line frequency. Despite this, a high power factor is maintained in all operating conditions, as well as compliance with the relevant harmonic standards.Dyson Technology Ltd and Newcastle Univer- sit