A Low Area, Switched-Resistor Based Fractional-N Synthesizer Applied to a MEMS-Based Programmable Oscillator

Abstract-MEMS-based oscillators have recently become a topic of interest as integrated alternatives are sought for quartz-based frequency references. When seeking a programmable solution, a key component of such systems is a low power, low area fractional-N synthesizer, which also provides a convenient path for compensating changes in the MEMS resonant frequency with temperature and process. We present several techniques enabling efficient implementation of this synthesizer, including a switched-resistor loop filter topology that avoids a charge pump and boosts effective resistance to save area, a high gain phase detector that lowers the impact of loop filter noise, and a switched capacitor frequency detector that provides initial frequency acquisition. The entire synthesizer with LC VCO occupies less than 0.36 sq. mm in 0.18 m CMOS. Chip power consumption is 3.7 mA at 3.3 V supply (20 MHz output, no load). Index Terms-MEMS, fractional-N synthesizer, reference frequency, phase-locked loop (PLL), loop filter, high gain phase detector, switched resistor, switched capacitor, frequency acquisition, frequency detection, phase detection, oscillator, temperature stable

Efficient and Interference-Resilient Wireless Connectivity for IoT Applications

With the coming of age of the Internet of Things (IoT), demand on ultra-low power (ULP) and low-cost radios will continue to boost tremendously. The Bluetooth-Low-energy (BLE) standard provides a low power solution to connect IoT nodes with mobile devices, however, the power of maintaining a connection with a reasonable latency remains the limiting factor in defining the lifetime of event-driven BLE devices. BLE radio power consumption is in the milliwatt range and can be duty cycled for average powers around 30μW, but at the expense of long latency. Furthermore, wireless transceivers traditionally perform local oscillator (LO) calibration using an external crystal oscillator (XTAL) that adds significant size and cost to a system. Removing the XTAL enables a true single-chip radio, but an alternate means for calibrating the LO is required. Innovations in both the system architecture and circuits implementation are essential for the design of truly ubiquitous receivers for IoT applications. This research presents two porotypes as back-channel BLE receivers, which have lower power consumption while still being robust in the presents of interference and able to receive back-channel message from BLE compliant transmitters. In addition, the first crystal-less transmitter with symmetric over-the-air clock recovery compliant with the BLE standard using a GFSK-Modulated BLE Packet is presented.PHDElectrical and Computer EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/162942/1/abdulalg_1.pd

Doctor of Philosophy

dissertationSince the late 1950s, scientists have been working toward realizing implantable devices that would directly monitor or even control the human body's internal activities. Sophisticated microsystems are used to improve our understanding of internal biological processes in animals and humans. The diversity of biomedical research dictates that microsystems must be developed and customized specifically for each new application. For advanced long-term experiments, a custom designed system-on-chip (SoC) is usually necessary to meet desired specifications. Custom SoCs, however, are often prohibitively expensive, preventing many new ideas from being explored. In this work, we have identified a set of sensors that are frequently used in biomedical research and developed a single-chip integrated microsystem that offers the most commonly used sensor interfaces, high computational power, and which requires minimum external components to operate. Included peripherals can also drive chemical reactions by setting the appropriate voltages or currents across electrodes. The SoC is highly modular and well suited for prototyping in and ex vivo experimental devices. The system runs from a primary or secondary battery that can be recharged via two inductively coupled coils. The SoC includes a 16-bit microprocessor with 32 kB of on chip SRAM. The digital core consumes 350 μW at 10 MHz and is capable of running at frequencies up to 200 MHz. The integrated microsystem has been fabricated in a 65 nm CMOS technology and the silicon has been fully tested. Integrated peripherals include two sigma-delta analog-to-digital converters, two 10-bit digital-to-analog converters, and a sleep mode timer. The system also includes a wireless ultra-wideband (UWB) transmitter. The fullydigital transmitter implementation occupies 68 x 68 μm2 of silicon area, consumes 0.72 μW static power, and achieves an energy efficiency of 19 pJ/pulse at 200 MHz pulse repetition frequency. An investigation of the suitability of the UWB technology for neural recording systems is also presented. Experimental data capturing the UWB signal transmission through an animal head are presented and a statistical model for large-scale signal fading is developed

Reconfigurable multi-carrier transmitters and their application in next generation optical networks

With the advent of new series of Internet services and applications, future networks will have to go beyond basic Internet connectivity and encompass diverse services including connected sensors, smart devices, vehicles, and homes. Today’s telecommunication systems are static, with pre-provisioned links requiring an expensive and time-consuming reconfiguration process. Hence, future networks need to be flexible and programmable, allowing for resources to be directed, where the demand exists, thus improving network efficiency. A cost-effective solution is to utilise the legacy fibre infrastructure more efficiently, by reducing the size of the guard bands and allowing closer optical carrier spacing, thereby increasing the overall spectral efficiency. However, such a scheme imposes stringent transmitter requirements such as frequency stability, which would not be met with the incumbent laser-array based transmitters. An attractive alternative would be to employ an optical frequency comb (OFC), which generates multiple phase correlated carriers with precise frequency separation. The reconfigurability of such a multi-carrier transmitter would enable tuning of channel spacing, number of carriers and emission wavelengths, according to the dynamic network demands. This research thesis presents the work carried out, in the physical layer, towards realising reconfigurability of an optical multi-carrier transmitter system. The work focuses on an externally injected gain-switched laser-based OFC (EI-GSL), which is a particular type of multi-carrier source. Apart from the detailed characterisation of GSL OFCs, advances to the state of the art are achieved via comb expansion, investigating new demultiplexing methods and system implementations. Firstly, two novel broadband GS-OFC generation techniques are proposed and experimentally demonstrated. Subsequently, two flexible and compact demultiplexing solutions, based on micro-ring resonators and laser based active demultiplexers are investigated. Finally, the application of a reconfigurable multi-carrier transmitter, employed in access and data centre networks, as well as analog-radio over fibre (A-RoF) distribution systems, is experimentally demonstrated