The Implementation of DMA Controller on Navigation Baseband SoC

This article discusses the architecture design of DMA controller on high performance GPS receiver based on RTEMS. We achieve the optimal integration of DMA IP and navigation baseband system. We designed the hardware architecture of DMA IP and make full use of hardware performance with the idea of multiplexing. We use register and FIFO buffer to achieve read-write control. And we design the DMA controller with Verilog HDL. Finally we verify the design on Altera Cyclone4 FPGA. The result demonstrates that DMA controller can ease the CPU2019;s burden and shorten the acquisitio

Applications for FPGA's on Nanosatellites

This thesis examines the feasibility of using a Field Programmable Gate Array (FPGA) based design on-board a CubeSat-sized nanosatellite. FPGAs are programmable logic devices that allow for the implementation of custom digital hardware on a single Integrated Circuit (IC). By using these FPGAs in spacecraft, more efficient processing can be done by moving the design onto hardware. A variety of different FPGA-based designs are looked at, including a Watchdog Timer (WDT), a Global Positioning System (GPS) receiver, and a camera interface

Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals

Multimedia applications are driving wireless network operators to add high-speed data services such as Edge (E-GPRS), WCDMA (UMTS) and WLAN (IEEE 802.11a,b,g) to the existing GSM network. This creates the need for multi-mode cellular handsets that support a wide range of communication standards, each with a different RF frequency, signal bandwidth, modulation scheme etc. This in turn generates several design challenges for the analog and digital building blocks of the physical layer. In addition to the above-mentioned protocols, mobile devices often include Bluetooth, GPS, FM-radio and TV services that can work concurrently with data and voice communication. Multi-mode, multi-band, and multi-standard mobile terminals must satisfy all these different requirements. Sharing and/or switching transceiver building blocks in these handsets is mandatory in order to extend battery life and/or reduce cost. Only adaptive circuits that are able to reconfigure themselves within the handover time can meet the design requirements of a single receiver or transmitter covering all the different standards while ensuring seamless inter-interoperability. This paper presents analog and digital base-band circuits that are able to support GSM (with Edge), WCDMA (UMTS), WLAN and Bluetooth using reconfigurable building blocks. The blocks can trade off power consumption for performance on the fly, depending on the standard to be supported and the required QoS (Quality of Service) leve

Software Defined Radio Implementation of Carrier and Timing Synchronization for Distributed Arrays

The communication range of wireless networks can be greatly improved by using distributed beamforming from a set of independent radio nodes. One of the key challenges in establishing a beamformed communication link from separate radios is achieving carrier frequency and sample timing synchronization. This paper describes an implementation that addresses both carrier frequency and sample timing synchronization simultaneously using RF signaling between designated master and slave nodes. By using a pilot signal transmitted by the master node, each slave estimates and tracks the frequency and timing offset and digitally compensates for them. A real-time implementation of the proposed system was developed in GNU Radio and tested with Ettus USRP N210 software defined radios. The measurements show that the distributed array can reach a residual frequency error of 5 Hz and a residual timing offset of 1/16 the sample duration for 70 percent of the time. This performance enables distributed beamforming for range extension applications.Comment: Submitted to 2019 IEEE Aerospace Conferenc

Reconfigurable Radio System Test bed for security research

Technological progress on the digital processing has opened the way to a novel implementation approach for wireless communication platforms where most of the digital signal processing is done in software rather than in hardware. Such systems have been known as Software Defined Radio (SDR) or Reconfigurable Radio Systems (RRS). A typical SDR/RRS is able to execute all the radio frequency and base-band processing though software components rather then hardware components as in conventional radio communication systems. This capability provides a high level of reconfigurability and the possibility to implement a number of different algorithms for digital processing. Therefore, SDR/RRS can be used for a variety or purposes including the possibility of implementing wireless security attacks against conventional communication systems. In this technical report, we present an application of the SDR/RRS platform to implement a security attack against a DECT platform. The SDR/RRS platform has been used to implement a DECT demodulator and a processing module to eavesdrop and capture user and control data transmitted by a DECT system. The commercially available Universal Software Radio Peripheral (USRP) has been used as SDR/RRS platform for the development of the prototype. The paper presents the technical challenges and implementation details in the development of the prototype and an overview of the capabilities of the USRP to implement wireless security attacks. The SDR/RRS platform used in the project is quite versatile and it can be used for a number of other applications related to DECT or other wireless communication systems.JRC.G.6-Security technology assessmen

The GPS-Linked Transponder - A Command, Telemetry, and Positioning System for Small Spacecraft

A proposed GPS-Linked Transponder (GLT) Command, Telemetry, and Positioning System is described that offers significant advantages over present systems. The new system would replace the standard coherent transponder and modify existing ground-based systems to provide the U.S. space industry with significantly smaller and lighter-weight flight systems in addition to simplified ground stations with reduced operating costs. The GLT comprises a NASA STDN/ DSN-compatible or AFSCN/SGLS-compatible command receiver/detector, a 20-Mbps-capable PCM/PSK telemetry transmitter with a selectable-rate FEC encoder and optional encryptor, and a dual-mode spacecraft positioning subsystem including a full GPS receiver/navigator and/or GPS trans digitizer. The GLT design is based on similar hardware developed by APL for SDlO. The system will recover high accuracy spacecraft position and time data-either in real time autonomously or in near-real time on the ground-using advanced GPS positioning techniques. A simplified command receiver option is also available when compatibility with existing standards is not required and improved capability is desired. In the transdigitizer-only mode, mass and size are reduced to nearly one-tenth of existing transponder systems. Other advantages include reduced complexity and significantly higher uplink and downlink data rate communications than presently supported. Five ground-station configurations are defined, each providing varying levels of spacecraft positioning accuracies to the user

Implementation of the specification and schematics design for the Ethernet Fronthaul Module

Abstract. This Master’s Thesis covers theory and implementation of a device which is designed using a small base station as a reference. The theory chapter consists of the description and theory of a cloud radio access network architecture, a high data rate interface, an active antenna system and a designed device itself. This theory chapter is used to give reasons why the device is designed. The implementation chapter is divided into two chapters, which explains how the implementation specification is done and how the schematics were drawn. The schematics chapter covers the modifications, which are done to the hardware of the original small base station. Ethernet Fronthaul Moduulin implementointispesifikaation ja piirikaavion suunnittelu. Tiivistelmä. Tämä diplomityö käsittelee pienen tukiasemalaitteen pohjalta suunniteltavan laitteen, siihen liittyvän teorian sekä toteutuksen. Laitteeseen liittyvä teoria muodostuu neljästä kappaleesta, jotka käsittelevät cloud radio access network -arkkitehtuuria, nopean data määrän rajapintaa, aktiivi antenni systeemiä sekä itse suunnitellun laitteen teoriaa. Teorialla pyritään pohjustamaan syitä siihen, minkä vuoksi kyseinen laite on haluttu toteuttaa. Laitteen toteutusta käsittelevä kappale on jaettu kahteen osioon, joissa kuvataan implementointispesifikaation toteutus ja piirikaavioiden piirto. Piirikaavio kappaleessa käsitellään muutokset, jotka on tehty pohjana käytettävän tukiaseman laitteistolle