A survey and taxonomy of layout compaction algorithms

This paper presents a survey and a taxonomy of layout compaction algorithms, which are an essential part of modern symbolic layout tools employed in VLSI circuit design. Layout compaction techniques are also used in the low-end stages of silicon compilation tools and module generators. The paper addresses the main algorithms used in compaction, focusing on their implementation characteristics, performance, advantages and drawbacks. Compaction is a highly important operation to optimize the use of silicon area, achieve higher speed through wire length minimization, support technology retargeting and also allow the use of legacy layouts. Optimized cells that were developed for a fabrication process with a set of design rules have to be retargeted for a new and more compact process with a different set of design rules

An approach to display layout of dynamic windows

The development of windows based user interface has introduced a new dimension to the field of human computer interaction. Now a user is able to perform multiple tasks at a time, often switching from one task to another. However windows environment also imposes the burden of manual windows management on the user. Several studies have suggested that manual window management is an unproductive chore often resulting in clutter and confusion on the display screen. Therefore we need a automatic windows layout generator to free the user to perform other useful tasks. This thesis introduces SPORDAC {Shadow Propagation for Overlap Removal and Display Area Compaction) algorithm. This algorithm aims to remove overlap from the display layout and encapsulate the layout in the finite display area. The SPORDAC prototype integrates the SPORDAC algorithm with simulated annealing to optimise the display area usage. The usefulness and applicability of the SPORDAC approach are illustrated with the implementation of a prototype, samples of generated layouts and analysis of the collected dat

Using One-Dimensional Compaction for Smaller Graph Drawings

We review the technique of one-dimensional compaction and use it as part of two new methods tackling problems in the context of automatic diagram layout: First, a postprocessing of the layer-based layout algorithm, also known as Sugiyama layout, and second a placement algorithm for connected components with external extensions. We apply our methods to dataflow diagrams from practical applications and find that the first method significantly reduces the width of left-to-right drawn diagrams. The second method allows to properly arrange disconnected graphs that have hierarchycrossing edges. Keywords: one-dimensional compaction, diagram layout, layer-based layout, Sugiyama layout, disconnected graphs, dataflow diagram