WIRELESS POWER MANAGEMENT CIRCUITS FOR BIOMEDICAL IMPLANTABLE SYSTEMS

Ph.DDOCTOR OF PHILOSOPH

Circuits and systems for inductive power transfer

Recently, the development of Wireless Power Transfer (WPT) systems has shown to be a key factor for improving the robustness, usability and autonomy of many mobile devices. The WPT link relaxes the trade-off between the battery size and the power availability, enabling highly innovative applications. This thesis aims to develop novel techniques to increase efficiency and operating distance of inductive power transfer systems. We addressed the design of the inductive link and various circuits used in the receiver. Moreover, we performed a careful system-level analysis, taking into account the design of different blocks and their interaction. The analysis is oriented towards the development of low power applications, such as Active Implantable Medical Device (AIMD) or Radio-Frequency Identification (RFID) systems. Three main approaches were considered to increase efficiency and operating distance: 1) The use of additional resonant coils, placed between the transmitter and the receiver. 2) The receiver coil impedance matching. 3) The design of high-efficiency rectifiers and dc-dc converters. The effect of the additional coils in the inductive link is usually studied without considering its influence on other parts of the WPT system. In this work, we theoretically analyzed and compared 2 and 3-coil links, showing the advantages of using the additional coil together with a matching network in the receiver. The effect of the additional coils in a closed-loop regulated system is also addressed, demonstrating that the feedback-loop design should consider the number of coils used in the link. Furthermore, the inclusion of one additional resonant coil in an actual half-duplex RFID system at 134:2 kHz is presented. The maximum efficiency point can be achieved by adjusting the receiver coil load impedance in order to reach its optimum value. In inductive powering, this optimum impedance is often achieved by adapting the input impedance of a dc-dc converter in the receiver. A matching network can also be used for the same purpose, as have been analyzed in previous works. In this thesis, we propose a joint design using both, matching network and dc-dc converters, highlighting the benefits of using the combined approach. A rectifier must be included in any WPT receiver. Usually, a dc-dc converter is included after the rectifier to adjust the output voltage or control the rectifier load impedance. The efficiency of both, rectifier and dc-dc converter, impacts not only the load power but also the receiver dissipation. In applications such as AIMDs, to get the most amount of power with low dissipation is crucial to full safety requirements. We present the design of an active rectifier and a switched capacitor dc-dc converter. In low-power applications, the power consumption of any auxiliary block used in the circuit may decrease the efficiency due to its quiescent consumption. Therefore, we have carefully designed these auxiliary blocks, such as operational transconductance amplifiers and voltage comparators. The main contributions of this thesis are: . Deduction of simplified equations to compare 2 and 3-coil links with an optimized Matching Network (MN). . Development of a 3-coil link half-duplex RFID 134.2 kHz system. . Analysis of the influence of the titanium case in the inductive link of implantable medical devices. . Development of a joint design ow which exploits the advantages of using both MNs and dc-dc converters in the receiver to achieve load impedance matching. . Analysis of closed-loop postregulated systems, highlighting the effects that the additional coils, receiver resonance (series or parallel), and type of driver (voltage or current) used in the transmitter, have in the feedback control loop. . Proposal of systematic analysis and design of charge recycling switches in step-up dc-dc converters. . New architecture for low-power high slew-rate operational transconductance amplifier. Novel architecture for high-efficiency active rectifier. The thesis is essentially based on the publications [1{9]. During the PhD program, other publications were generated [10{15] that are partially or non-included in the thesis. Additionally, some contributions presented in the text, are in process of publication.Hace ya un buen tiempo que las redes inalámbricas constituyen uno de los temas de investigación más estudiados en el área de las telecomunicaciones. Actualmente un gran porcentaje de los esfuerzos de la comunidad científifica y del sector industrial están concentrados en la definición de los requerimientos y estándares de la quinta generación de redes móviles. 5G implicará la integración y adaptación de varias tecnologías, no solo del campo de las telecomunicaciones sino también de la informática y del análisis de datos, con el objetivo de lograr una red lo suficientemente flexible y escalable como para satisfacer los requerimientos para la enorme variedad de casos de uso implicados en el desarrollo de la “sociedad conectada”. Un problema que se presenta en las redes inalámbricas actuales, que por lo tanto genera un desafío más que interesante para lo que se viene, es la escasez de espectro radioeléctrico para poder asignar bandas a nuevas tecnologías y nuevos servicios. El espectro está sobreasignado a los diferentes servicios de telecomunicaciones existentes y las bandas de uso libre o no licenciadas están cada vez más saturadas de equipos que trabajan en ellas (basta pensar lo que sucede en la banda no licenciada de 2.4 GHz). Sin embargo, existen análisis y mediciones que muestran que en diversas zonas y en diversas escalas de tiempo, el espectro radioeléctrico, si bien está formalmente asignado a algún servicio, no se utiliza plenamente existiendo tiempos durante los cuales ciertas bandas están libres y potencialmente podrían ser usadas. Esto ha llevado a que las Redes Radios Cognitivas, concepto que existe desde hace un tiempo, sean consideradas uno de los pilares para el desarrollo de las redes inalámbricas del futuro. En los ultimos años la transferencia inalámbrica de energía (WPT) ha cobrado especial atención, ya que logra aumentar la robustez, usabilidad y autonomía de los dispositivos móviles. Transferir energía inalámbricamente relaja el compromiso entre el tamaño de la batería y la disponibilidad de energía, permitiendo aplicaciones que de otro modo no serían posibles. Esta tesis tiene como objetivo desarrollar técnicas novedosas para aumentar la eficiencia y la distancia de transmisión de sistemas de transferencia inalámbrica por acople inductivo (IPT). Se abordó el diseño del enlace inductivo y varios circuitos utilizados en el receptor de energía. Además, realizamos un cuidadoso análisis a nivel sistema, teniendo en cuenta el diseño conjunto de diferentes bloques. Todo el trabajo está orientado hacia el desarrollo de aplicaciones de bajo consumo, como dispositivos médicos implantables activos (AIMD) o sistemas de identificación por radio frecuencia (RFID). Se consideraron principalmente tres enfoques para lograr mayor eficienciay distancia: 1) El uso de bobinas resonantes adicionales, colocadas entre el transmisor y el receptor. 2) El uso de redes de adaptación de impedancia en el receptor. 3) El diseño de circuitos rectificdores y conversores dc-dc con alta eficiencia.El efecto ocasionado por las bobinas resonantes adicionales en el enlace inductivo es usualmente abordado sin tener en cuenta su influenciaen todas las partes del sistema. En este trabajo, analizamos teóricamente y comparamos sistemas de 2 y 3 bobinas, mostrando las ventajas que tiene la bobina adicional en conjunto con el uso de redes de adaptación. El efecto de dicha bobina, en sistemas de lazo cerrado fue también estudiado, demostrando que el diseño del lazo debe considerar el número de bobinas que utiliza el link. Se trabajó con un sistema real de RFID, analizando el uso de una bobina resonante en una aplicación práctica existente y de amplio uso en el Uruguay

Design of a Limiting Amplifier for an Optical Receiver

The HEP experiments that take place at CERN’s LHC demand a multi-gigabit optical link for an efficient transmission of the resulting generated data. An optoelectronic link arises as the best solution given its possibility of working at high data rates and due to fiber’s imunnity to electromagnetic noise. The design of this optical link is particularly demanding due to the stringent data rate specifications (5Gb/s), the BER specification (1012) and the constraints imposed by radiation. In HEP, radiation is always a constraint so, the Optical Receiver circuit must be hardened in order to tolerate that kind of environment - radiation-tolerant. The core of a standard optoeletronic receiver includes a Photodiode, a Transimpedance Amplifier (TIA) and a Limiting Amplifier (LA). This thesis proposes the study and implementation of one of these blocks (LA), as the main focus, as well as the analysis and design of all three other blocks. The two major design constraints regarding the LA are the bandwidth and minimising its power consumption, which were overcome by using two bandwidth enhancement techniques. The circuit yields a bandwidth of 4:8GHz with a power consumption under 19mW. Another fundamental block is the Output Buffer. The major request for this block was maintaining relatively low transition times and improving the signal’s integrity. It has a differential output swing around 400mV with Pre-emphasis levels larger than 130%. The third block is the Received Signal Strength Indicator (RSSI). From a system point of view it is useful to have a measure of the input signal’s power so that the communication channel is used in its full potential. With a power consumption smaller than 600μW the RSSI presents an input dynamic range larger than 50 dB. The fourth block implements a Squelch function, in order to suppress unwanted output toggling due to noise. All these elements were developed in a TSMC 65nm CMOS process with a 1:2V supply voltage

A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip

The advent of battery operated sensor-based electronic systems has provided a pressing need to design energy-efficient, ultra-low power integrated circuits as a means to improve the battery lifetime. This dissertation describes a scheme to lower the power requirement of a digital circuit through the use of charge-recycling and dynamic supply-voltage scaling techniques. The novel charge-recycling scheme proposed in this research demonstrates the feasibility of operating digital circuits using the charge scavenged from the leakage and dynamic load currents inherent to digital design. The proposed scheme efficiently gathers the “ground-bound” charge into storage capacitor banks. This reclaimed charge is then subsequently recycled to power the source digital circuit. The charge-recycling methodology has been implemented on a 12-bit Gray-code counter operating at frequencies of less than 50 MHz. The circuit has been designed in a 90-nm process and measurement results reveal more than 41% reduction in the average energy consumption of the counter. The total energy savings including the power consumed for the generation of control signals aggregates to an average of 23%. The proposed methodology can be applied to an existing digital path without any design change to the circuit but with only small loss to the performance. Potential applications of this scheme are described, specifically in wide-temperature dynamic power reduction and as a source for energy harvesters. The second part of this dissertation deals with the design and development of a self-starting, ultra-low voltage, switched-capacitor (SC) DC-DC converter that is essential to an energy harvesting system. The proposed charge-pump based SC-converter operates from 125-mV input and thus enables battery-less operation in ultra-low voltage energy harvesters. The charge pump does not require any external components or expensive post-fabrication processing to enable low-voltage operation. This design has been implemented in a 130-nm CMOS process. While the proposed charge pump provides significant efficiency enhancement in energy harvesters, it can also be incorporated within charge recycling systems to facilitate adaptable charge-recycling levels. In total, this dissertation provides key components needed for highly energy-efficient mixed signal systems-on-a-chip

Energy Harvesting for Self-Powered Wireless Sensors

A wireless sensor system is proposed for a targeted deployment in civil infrastructures (namely bridges) to help mitigate the growing problem of deterioration of civil infrastructures. The sensor motes are self-powered via a novel magnetic shape memory alloy (MSMA) energy harvesting material and a low-frequency, low-power rectifier multiplier (RM). Experimental characterizations of the MSMA device and the RM are presented. A study on practical implementation of a strain gauge sensor and its application in the proposed sensor system are undertaken and a low-power successive approximation register analog-to-digital converter (SAR ADC) is presented. The SAR ADC was fabricated and laboratory characterizations show the proposed low-voltage topology is a viable candidate for deployment in the proposed sensor system. Additionally, a wireless transmitter is proposed to transmit the SAR ADC output using on-off keying (OOK) modulation with an impulse radio ultra-wideband (IR-UWB) transmitter (TX). The RM and SAR ADC were fabricated in ON 0.5 micrometer CMOS process. An alternative transmitter architecture is also presented for use in the 3-10GHz UWB band. Unlike the IR-UWB TX described for the proposed wireless sensor system, the presented transmitter is designed to transfer large amounts of information with little concern for power consumption. This second method of data transmission divides the 3-10GHz spectrum into 528MHz sub-bands and "hops" between these sub-bands during data transmission. The data is sent over these multiple channels for short distances (?3-10m) at data rates over a few hundred million bits per second (Mbps). An UWB TX is presented for implementation in mode-I (3.1-4.6GHz) UWB which utilizes multi-band orthogonal frequency division multiplexing (MB-OFDM) to encode the information. The TX was designed and fabricated using UMC 0.13 micrometer CMOS technology. Measurement results and theoretical system level budgeting are presented for the proposed UWB TX

Efficient power conversion interface circuits for energy harvesting applications

Harvesting energy from the environment for powering micro-power devices have been increasing in popularity. These types of devices can be used in embedded applications or in sensor networks where battery replacement is impractical. In this dissertation, different methods of energy harvesting from the environment are explored as alternative sources of energy for devices. Some of the most popular energy extraction used in electronic devices today are radio frequency (RF) and thermal/vibrational energy extraction. This dissertation presents novel power techniques that enable some of the most efficient power conversion circuits published to date. New power conversion circuits to interface to a piezoelectric micro-power generator that produces electrical energy from temperature differences have been fabricated and tested. Circuit designs and measurement results are presented for a half-wave synchronous rectifier with voltage doubler, a full-wave synchronous rectifier and a passive full-wave rectifier circuit. The active rectifier based on synchronous rectification, fabricated in a 0.25-μm CMOS process, is 86% efficient with 22-μW peak output power when connected to the piezoelectric micro-power generator. This gives the highest efficiency to date for active rectification circuits at the micro-power level. The passive rectifier circuit is 66% efficient with 16-μW peak output power and requires no quiescent current to operate. RF-powered devices are typically inductively coupled and extract their energy from the near field while operating within a few inches of the radiating source. Longer operating distances, exceeding 10 meters, are desired for a broader set of applications including distributed sensor networks. This dissertation describes an efficient method for far field power extraction from RF energy to enable long distance passively powered sensor networks. Passive rectifier circuits are designed in the TSMC 0.25μm mixed-signal CMOS process and antennas for the system are printed on a 4-layer FR4 board. A high-Q resonator is used with a matching network to passively amplify the input voltage to the rectifier. At the circuit level, floating gate transistors are used as rectifying diodes to reduce the diode threshold loss in voltage rectification and therefore increase the rectifier efficiency. A 36-stage rectifier fabricated in a 0.25-μm CMOS process attains an efficiency of over 60% in the far field with a received power sensitivity of 5.5μW(-22.6 dBm), corresponding to an operating distance of 44 meters. The effective threshold voltage of the floating-gate diode is reduced to 36 mV. This is the highest performance for far-field RF energy conversion reported to date. In ultra-low energy system, such as sensor networks, it is essential that power management circuitry are designed to dissipate very low quiescent power. RF energy and power management circuits are designed in a 0.18μm CMOS process. Voltage regulators are designed to operate at high input voltage and low power in a standard CMOS process. The voltage regulators can withstand input voltages up to 12 volts and dissipates from 90 nW to 1.4 μW of power. A floating-gate programming circuit is designed with a self-wakeup timer that turns itself on about once a month. The floating-gate programming circuits dissipates about 30 nW in sleep mode and 8 μW in active mode