Performance Comparison of PSO and Its New Variants in the Context of VLSI Global Routing

Substantial reduction of gate delay occurred in recent times owing to radical decrement of transistor size. The interconnect length and delay are accordingly increased owing to the exponential escalation of packaging density with additional transistors being fabricated on the same chip area. The function of VLSI routing that seems to be more defying to the scholars, is categorized in global routing and detailed routing phase. In global routing phase, the prevalent method to lessen the wire length for reducing interconnect delay is to adjust the cost of the Steiner tree, devised by the terminal nodes to be interconnected. Nevertheless, Steiner tree problem is a NP-complete problem in classical graph theory where meta-heuristics might impart beneficial elucidations. Particle swarm optimization (PSO) is a robust algorithm concerning VLSI routing field. This chapter is regarding the proposal of a self-adaptive mechanism for monitoring acceleration coefficient of PSO and evaluating its functionalities with the existing acceleration coefficient controlled PSO in numerous allocation topologies of terminal nodes within definite VLSI layout. The outcomes of PSO variant with constriction factor in context to VLSI route reduction ability and robustness are also inspected. Additionally, a new effort in adapting the PSO with embracement of genetic algorithm is established

Using ant colony optimization for routing in microprocesors

Power consumption is an important constraint on VLSI systems. With the advancement in technology, it is now possible to pack a large range of functionalities into VLSI devices. Hence it is important to find out ways to utilize these functionalities with optimized power consumption. This work focuses on curbing power consumption at the design stage. This work emphasizes minimizing active power consumption by minimizing the load capacitance of the chip. Capacitance of wires and vias can be minimized using Ant Colony Optimization (ACO) algorithms. ACO provides a multi agent framework for combinatorial optimization problems and hence is used to handle multiple constraints of minimizing wire-length and vias to achieve the goal of minimizing capacitance and hence power consumption. The ACO developed here is able to achieve an 8% reduction of wire-length and 7% reduction in vias thereby providing a 7% reduction in total capacitance, compared to other state of the art routers

Image Segmentation using Various Approaches

This paper addresses the issue of image segmentation. Image segmentation process is the main basic process or technique used in various image processing problem domains, for example, content based image retrieval; pattern recognition; object recognition; face recognition; medical image processing; fault detection in product industries; etc. Scope of improvement exists in the following areas: Image partitioning; color based feature; texture based feature, searching mechanism for similarity; cluster formation logic; pixel connectivity criterion; intelligent decision making for clustering; processing time; etc. This paper presents the image segmentation mechanism which addresses few of the identified areas where the scope of contribution exists. Presented work basically deals with the development of the mechanism which is divided into three parts first part focuses on the color based image segmentation using k-means clustering methodology. Second part deals with region properties based segmentation. Later, deals with the boundary based segmentation. In all these three approaches, finally the Steiner tree is created to identify the class of the region. For this purpose the Euclidean distance is used. Experimental result justifies the application of the developed mechanism for the image segmentation

Computing Near-Optimal Solutions to the Steiner Problem in a Graph Using a Genetic Algorithm

A new Genetic Algorithm (GA) for the Steiner Problem in a Graph (SPG) is presented. The algorithm is based on a bitstring encoding. A bitstring specifies selected Steiner vertices and the corresponding Steiner tree is computed using the Distance Network Heuristic. This scheme ensures that every bitstring correspond to a valid Steiner tree and thus eliminates the need for penalty terms in the cost function. The GA is tested on all SPG instances from the OR-Library of which the largest graphs have 2,500 vertices and 62,500 edges. When executed 10 times on each of 58 graph examples, the GA finds the global optimum at least once for 55 graphs and every time for 43 graphs. In total the GA finds the global optimum in 77 % of all program executions and is within 1 % from the global optimum in more than 92 % of all executions. The performance is compared to that of two branch-and-cut algorithms and one of the very best deterministic heuristics, an iterated version of the Shortest Path Heuristic (SPH-I). For all test examples but one, even the worst result ever found by the GA is equal to or better than the result of SPH-I and in many cases the average error ratio of the GA is an order of magnitude better than that of SPH-I. The runtime of the GA is moderate for all test examples. This is in contrast to SPH-I as well as the branch-and-cut algorithms, for which the runtime in some cases are extremely high