A monolithically integrated silicon modulator with a 10 Gb/s 5 V pp or 5.6 V pp driver in 0.25 μm SiGe:C BiCMOS

This paper presents as a novelty a fully monolithically integrated 10 Gb/s silicon modulator consisting of an electrical driver plus optical phase modulator in 0.25 μm SiGe:C BiCMOS technology on one chip, where instead of a SOI CMOS process (only MOS transistors) a SiGe BiCMOS process (MOS transistors and fast SiGe bipolar transistors) is implemented. The fastest bipolar transistors in the BiCMOS product line used have a transit frequency of f t ≈ 120 GHz and a collector-emitter breakdown voltage of BV CE0 = 2.2 V (IHP SG25H3). The main focus of this paper will be given to the electronic drivers, where two driver variants are implemented in the test chips. Circuit descriptions and simulations, which treat the influences of noise and bond wires, are presented. Measurements at separate test chips for the drivers show that the integrated driver variant one has a low power consumption in the range of 0.66 to 0.68 W but a high gain of S 21 = 37 dB. From the large signal point of view this driver delivers an inverted as well as a non-inverted output data signal between 0 and 2.5 V (5 V pp differential). Driver variant one is supplied with 2.5 V and with 3.5 V. Bit-error-ratio (BER) measurements resulted in a BER better than 10 −12 for voltage differences of the input data stream down to 50 mV pp . Driver variant two, which is an adapted version of driver variant one, is supplied with 2.5 and 4.2 V, consumes 0.83 to 0.87 W, delivers a differential data signal with 5.6 V pp at the output and has a gain of S 21 = 40 dB. The chip of the fully integrated modulator occupies an area of 12.3 mm 2 due to the photonic components. Measurements with a 240 mV pp electrical input data stream, 1.25 V input common-mode voltage and for an optical input wavelength of 1540 nm resulted in an extinction ratio of 3.3 dB for 1 mm long RF phase shifters in each modulator arm driven by driver variant one and a DC tuning voltage of 1.2 V. The extinction ratio was 8.4 dB at a DC tuning voltage of 7 V for a device with 2 mm long RF phase shifters in each arm and driver variant two

Silicon Photonic Waveguides and Devices for Near- and Mid-IR Applications

Silicon photonics has been a very buoyant research field in the last several years mainly because of its potential for telecom and datacom applications. However, prospects of using silicon photonics for sensing in the mid-IR have also attracted interest lately. In this paper, we present our recent results on waveguide-based devices for near- and mid-infrared applications. The silicon-on-insulator platform can be used for wavelengths up to 4 μm; therefore, different solutions are needed for longer wavelengths. We show results on passive Si devices such as couplers, filters, and multiplexers, particularly for extended wavelength regions and finally present integration of photonics and electronics integrated circuits for high-speed applications

Roadmapping the Next Generation of Silicon Photonics

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem

Open-access silicon photonics: current status and emerging initiatives

Silicon photonics is widely acknowledged as a game-changing technology driven by the needs of datacom and telecom. Silicon photonics builds on highly capital-intensive manufacturing infrastructure, and mature open-access silicon photonics platforms are translating the technology from research fabs to industrial manufacturing levels. To meet the current market demands for silicon photonics manufacturing, a variety of open-access platforms is offered by CMOS pilot lines, R&D institutes, and commercial foundries. This paper presents an overview of existing and upcoming commercial and noncommercial open-access silicon photonics technology platforms. We also discuss the diversity in these open-access platforms and their key differentiators

Survey of Photonic and Plasmonic Interconnect Technologies for Intra-Datacenter and High-Performance Computing Communications

Large scale data centers (DC) and high performance computing (HPC) systems require more and more computing power at higher energy efficiency. They are already consuming megawatts of power, and a linear extrapolation of trends reveals that they may eventually lead to unrealistic power consumption scenarios in order to satisfy future requirements (e.g., Exascale computing). Conventional complementary metal oxide semiconductor (CMOS)-based electronic interconnects are not expected to keep up with the envisioned future board-to-board and chip-to-chip (within multi-chip-modules) interconnect requirements because of bandwidth-density and power-consumption limitations. However, low-power and high-speed optics-based interconnects are emerging as alternatives for DC and HPC communications; they offer unique opportunities for continued energy-efficiency and bandwidth-density improvements, although cost is a challenge at the shortest length scales. Plasmonics-based interconnects on the other hand, due to their extremely small size, offer another interesting solution for further scaling operational speed and energy efficiency. At the device-level, CMOS compatibility is also an important issue, since ultimately photonics or plasmonics will have to be co-integrated with electronics. In this paper, we survey the available literature and compare the aforementioned interconnect technologies, with respect to their suitability for high-speed and energy-efficient on-chip and offchip communications. This paper refers to relatively short links with potential applications in the following interconnect distance hierarchy: local group of racks, board to board, module to module, chip to chip, and on chip connections. We compare different interconnect device modules, including low-energy output devices (such as lasers, modulators, and LEDs), photodetectors, passive devices (i.e., waveguides and couplers) and electrical circuitry (such as laserdiode drivers, modulator drivers, transimpedance, and limiting amplifiers). We show that photonic technologies have the potential to meet the requirements for selected HPC and DC applications in a shorter term. We also present that plasmonic interconnect modules could offer ultra-compact active areas, leading to high integration bandwidth densities, and low device capacitances allowing for ultra-high bandwidth operation that would satisfy the application requirements further into the future

Development of an integrated silicon photonic transceiver for access networks

Debido a la imparable aparición de dispositivos móviles multifunción junto con aplicaciones que requieren cada vez más un mayor ancho de banda en cualquier momento y en cualquier lugar, las futuras redes de acceso deberán ser capaces de proporcionar servicios tanto inalámbricos como cableados. Es por ello que una solución a seguir es el uso de sistemas de comunicaciones ópticas como medio de transporte de señales inalámbricas en enlaces de radio sobre fibra. Con ello, se converge a un dominio óptico reduciendo y aliviando el cuello de botella entre los estándares de acceso inalámbrico y cableado. En esta tesis, como parte de los objetivos establecidos en el proyecto europeo HELIOS en el que está enmarcada, se han investigado y desarrollado los bloques funcionales básicos necesarios para realizar un transceptor fotónico integrado trabajando en el rango de longitudes de onda milimétricas, y haciendo uso de los formatos de modulación más robustos y que mejor se adaptan al ámbito de aplicación considerado. El trabajo que se presenta en esta tesis se puede dividir básicamente en tres partes. La primera de ellas ofrece una descripción general de los beneficios del uso de la fotónica en silicio para el desarrollo de enlaces inalámbricos a velocidades de Gbps, así como el estado del arte de los transceptores desarrollados por los grupos de investigación más activos y punteros para satisfacer las necesidades de mercado, cada vez más exigentes. La segunda parte se centra en el estudio y desarrollo del transmisor integrado de onda milimétrica. Primero realizamos una breve introducción teórica tanto del funcionamiento de los dispositivos que forman parte del transmisor, como a los formatos de modulación existentes, centrando la atención en la modulación por desplazamiento de fase (PSK) que es la que se va a utilizar en el desarrollo de los dispositivos implicados, y más concretamente en la modulación (diferencial) de fase en cuadratura ((D)QPSK). También se presentan los bloques básicos que integran nuestro transmisor y se fijan las especificaciones que deben cumplir dichos bloques para conseguir una transmisión libre de errores. El transmisor está compuesto por un filtro/demultiplexor encargado de separar dos portadoras ópticas separadas una frecuencia de 60 GHz. Una de estas portadoras es modulada al pasar por un modulador DQPSK basado en una estructura de dos MachZehnders (MZs) anidados, para ser nuevamente combinada con la otra portadora óptica que se ha mantenido intacta. Una vez combinadas, éstas son fotodetectadas para ser transmitidas inalámbricamente. En la tercera parte de esta tesis, se investiga el uso de un esquema de diversidad en polarización junto a un receptor DQPSK integrado para la demodulación de la señal recibida. El esquema de diversidad en polarización está formado básicamente por dos bloques: un separador de polarización con el objetivo de separar la luz a la entrada del chip en sus dos componentes ortogonales; y un rotador de polarización. En lo que se refiere al receptor DQPSK propiamente dicho, se ha investigado y optimizado cada uno de los bloques funcionales que lo componen. Éstos son básicamente un divisor de potencia termo-ópticamente sintonizable basado en un interferómetro MZ, en serie con un interferómetro MZ que introduce un retardo de duración de un bit en uno de sus brazos, para obtener una correcta demodulación diferencial. El siguiente bloque que forma parte de nuestro receptor DQPSK es un 2x4 acoplador de interferencia multimodal actuando como un híbrido de 90 grados, cuyas salidas van a parar a dos fotodetectores balanceados de germanio. Las contribuciones principales de esta tesis han sido: ¿ Demostración de un filtro/demultiplexor con tres grados de sintonización con una relación de extinción superior a 25dB. ¿ Demostración de un rotador con una longitud de tan sólo 25µm y CMOS compatible. ¿ Demostración de un modulador DPSK a una velocidad máxima de 20 Gbit/s. ¿ Demostración de un demodulador DQPSK a una velocidad máxima de 20 Gbit/s.Due to the relentless emergence of multifunction mobile devices with applications that require increasingly greater bandwidth at anytime and anywhere, future access networks must be capable of providing both wireless and wired services. The use of optical communications systems as transport medium of wireless signals over fiber radio links is a steady solution to be taken into account. This will make possible a convergence to an optical domain reducing and alleviating the bottleneck between wireless access standards and current wired access. In this thesis, as part of the objectives of the European project HELIOS in which it is framed, we have investigated and developed the basic functional blocks needed to achieve an integrated photonic transceiver working in the range of millimetre wavelengths, and using robust modulation formats that best fit the scope considered. The work presented in this thesis can be basically divided into three parts. The first one provides an overview of the benefits of using silicon photonics for the development of wireless links at rates of Gbps, and the state of the art of the transceivers reported by the most important research groups in order to meet the increasingly demanding needs¿ market. The second part focuses on the study and development of millimetre-wave integrated transmitter. First we provide a brief theoretical introduction of the operation principles of the devices involved in the transmitter such as a modulation formats, focusing on the phase shift keying (PSK) which is the one that will be used, particularly the (differential) quadrature phase shift keying ((D) QPSK). We also present the building blocks involved in our transmitter and we set the specifications that must be met by these devices in order to achieve an error-free transmission. The transmitter includes a filter/demultiplexer which must separate two optical carriers 60 GHz separated. One of these optical carriers is modulated by passing through a DQPSK Mach-Zehnder-based modulator (MZM) by arranging two MZMs in a nested configuration. Using a combiner, the modulated optical signal and the un-modulated carrier are combined and photodetected to be transmitted wirelessly. In the third part of this thesis, we investigate the use of a polarization diversity scheme with an integrated DQPSK receiver for demodulating of the wireless signal. The polarization diversity scheme basically consists of two blocks: a polarization splitter in order to separate the random polarization state of the incoming light into its two orthogonal components, and a polarization rotator. Regarding the DQPSK receiver itself, all the functional blocks that comprise it have been investigated and optimized. It basically includes a thermo-optically tunable MZ interferometer power splitter, in series with a MZ interferometer that introduces, in one of its arms, a delay of one bit length in order to obtain a correct differential demodulation. The next building block of our DQPSK receiver is a 2x4 multimode interference coupler acting as a 90 degree hybrid, whose outputs are connected to two balanced germanium photodetectors. The main contributions of this thesis are: ¿ Demonstration of a filter/demultiplexer with three degrees of tuning and an extinction ratio greater than 25dB. ¿ Demonstration of a polarization rotator with a length of only 25¿m and CMOS compatible. ¿ Demonstration of a DPSK modulator at a maximum rate of 20 Gbit/s. ¿ Demonstration of a DQPSK demodulator to a maximum rate of 20 Gbit/s.Aamer, M. (2013). Development of an integrated silicon photonic transceiver for access networks [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/31649TESI

Design of Optical Interconnect Transceiver Circuits and Network-on-chip Architectures for Inter- and Intra-chip Communication

The rapid expansion in data communication due to the increased multimedia applications and cloud computing services necessitates improvements in optical transceiver circuitry power efficiency as these systems scale well past 10 Gb/s. In order to meet these requirements, a 26 GHz transimpedance amplifier (TIA) is presented in a 0.25-µm SiGe BiCMOS technology. It employs a transformer-based regulated cascode (RGC) input stage which provides passive negative-feedback gain that enhances the effective transconductance of the TIA’s input common-base transistor; reducing the input resistance and pro- viding considerable bandwidth extension without significant noise degradation or power consumption. The TIA achieves a 53 dBΩ single-ended transimpedance gain with a 26√ GHz bandwidth and 21.3 pA/H z average input-referred noise current spectral density. Total chip power including output buffering is 28.2 mW from a 2.5 V supply, with the core TIA consuming 8.2 mW, and the chip area including pads is 960 µm × 780 µm. With the advance of photonic devices, optical interconnects becomes a promising technology to replace the conventional electrical channels for the high-bandwidth and power efficient inter/intra-chip interconnect. Second, a silicon photonic transceiver is presented for a silicon ring resonator-based optical interconnect architecture in a 1V standard 65nm CMOS technology. The transmitter circuits incorporate high-swing drivers with non-linear pre-emphasis and automatic bias-based tuning for resonance wavelength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades-off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 GB/s operation, the ring modulator un- der 4Vpp driver achieves 12.7dB extinction ratio with 4.04mW power consumption, while a 0.28nm tuning range is obtained at 6.8µW/GHz efficiency with the bias-based tuning scheme implemented with the 2Vpp transmitter. When tested with a wire-bonded 150f- F p-i-n photodetector, the receiver achieves -12.7dBm sensitivity at a BER=10−15 and consumes 2.2mW at 8 GB/s. Third, a novel Nano-Photonic Network-on-Chip (NoC) architecture, called LumiNoC, is proposed for high performance and power-efficient interconnects for the chip-multi- processors (CMPs). A 64-node LumiNoC under synthetic traffic enjoys 50% less latency at low loads versus other reported photonic NoCs, and ∼25% less latency versus the electrical 2D mesh NoCs on realistic workloads. Under the same ideal throughput, LumiNoC achieves laser power reduction of 78%, and overall power reduction of 44% versus competing designs

Silicon Photonic Platforms and Systems for High-speed Communications

Data communication is a critical component of modern technology in our society. There is an increasing reliance on information being at our fingers tips and we expect a low-latency, high-bandwidth connection to deliver entertainment or enhanced productivity. In order to serve this demand, communications devices are being pressed for smaller form factors, higher data throughput, lower power consumption and lower cost. Similar demands exist in a number of applications including metro/long-haul telecommunications, shorter datacenter links and supercomputing. Silicon photonics promises to be a technology that will solve some of the difficulties with improving communication devices. Building photonics in silicon allows for reuse of the same fabrication technology that is used by the CMOS electronics industry, potentially allowing for large volumes, high yields and low costs. Part I of this thesis details the design of components needed in a high-speed silicon photonic platform to meet the current challenges for high-speed communications. The author’s work in modeling photodetectors resulted in improving photodetector bandwidth from 30 GHz to 67 GHz, the fastest reported at the time of publication. Details regarding the optimization and test of modulators are also presented with the first-reported 50 Gbps modulator at 1310-nm. A large scale parallel channel demonstration of high-speed silicon photonics is then presented showing the potential scalability for silicon photonics systems. A full transceiver requires a number of components other than the photodetector and modulator that are the core active pieces of a silicon photonics platform. Part II includes work on the design and test of silicon photonic components providing functionality beyond the photodetector and modulator. A novel design integrating Metal-Semiconductor Field Effect Transistors (MESFETs) into a silicon photonics platform without process change is shown. This integration enables enhanced control functionality with minimal overhead. The critical final piece for a silicon photonics platform, adding a light source, is demonstrated along with performance results of the resulting tunable, extended C-band laser. In Part III, previous work on an enhanced silicon photonics platform with complementary components is used to build a high-speed integrated coherent link and then tested with a silicon photonics-based tunable laser. The transceiver was shown to operate at 34 Gbaud dual-polarization 16-QAM for a total of 272 Gbps over a single channel. This was the first published demonstration of an integrated coherent where all of the optics were built in a silicon photonics platform

Monolithically Integrated Multilayer Silicon Nitride-on-Silicon Waveguide Platforms for 3-D Photonic Circuits and Devices

In this paper, we review and provide additional details about our progress on multilayer silicon nitride (SiN)-on-silicon (Si) integrated photonic platforms. In these platforms, one or more SiN waveguide layers are monolithically integrated onto a Si photonic layer. This paper focuses on the development of three-layer platforms for the O- and SCL-bands for very large-scale photonic integrated circuits requiring hundreds or thousands of waveguide crossings. Low-loss interlayer transitions and ultralow-loss waveguide crossings have been demonstrated, along with bilevel and trilevel grating couplers for fiber-to-chip coupling. The SiN and Si passive devices have been monolithically integrated with high-efficiency optical modulators, photodetectors, and thermal tuners in a single photonic platform