57 research outputs found
A FRAMEWORK FOR PERFORMANCE EVALUATION OF ASIPS IN NETWORK-BASED IDS
ABSTRACT Nowadays efficient usage of high-tech security tools and appliances is considered as an important criterion for security improvement of computer networks. Based on this assumption, Intrusion Detection and Prevention Systems (IDPS) have key role for applying the defense in depth strategy. In this situation, by increasing network bandwidth in addition to increasing number of threats, Network-based IDPSes have been faced with performance challenge for processing of huge traffic in the networks. A general solution for this bottleneck is exploitation of efficient hardware architectures for performance improvement of IDPS. In this paper a framework for analysis and performance evaluation of application specific instruction set processors is presented for usage in application of attack detection in Networkbased Intrusion Detection Systems(NIDS). By running this framework as a security application on V85
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project
Cyber-Physical Systems (CPSs) are dynamic and reactive systems interacting with processes, environment and, sometimes, humans. They are often distributed with sensors and actuators, characterized for being smart, adaptive, predictive and react in real-time. Indeed, image- and video-processing pipelines are a prime source for environmental information for systems allowing them to take better decisions according to what they see. Therefore, in FitOptiVis, we are developing novel methods and tools to integrate complex image- and video-processing pipelines. FitOptiVis aims to deliver a reference architecture for describing and optimizing quality and resource management for imaging and video pipelines in CPSs both at design- and run-time. The architecture is concretized in low-power, high-performance, smart components, and in methods and tools for combined design-time and run-time multi-objective optimization and adaptation within system and environment constraints
Design and management of image processing pipelines within CPS : Acquired experience towards the end of the FitOptiVis ECSEL Project
Cyber-Physical Systems (CPSs) are dynamic and reactive systems interacting with processes, environment and, sometimes, humans. They are often distributed with sensors and actuators, characterized for being smart, adaptive, predictive and react in real-time. Indeed, image- and video-processing pipelines are a prime source for environmental information for systems allowing them to take better decisions according to what they see. Therefore, in FitOptiVis, we are developing novel methods and tools to integrate complex image- and video-processing pipelines. FitOptiVis aims to deliver a reference architecture for describing and optimizing quality and resource management for imaging and video pipelines in CPSs both at design- and run-time. The architecture is concretized in low-power, high-performance, smart components, and in methods and tools for combined design-time and run-time multi-objective optimization and adaptation within system and environment constraints.Peer reviewe
Compiler-directed energy reduction using dynamic voltage scaling and voltage Islands for embedded systems
Cataloged from PDF version of article.Addressing power and energy consumption related issues early in the system design flow ensures good design and
minimizes iterations for faster turnaround time. In particular, optimizations at software level, e.g., those supported by compilers, are
very important for minimizing energy consumption of embedded applications. Recent research demonstrates that voltage islands
provide the flexibility to reduce power by selectively shutting down the different regions of the chip and/or running the select parts of the
chip at different voltage/frequency levels. As against most of the prior work on voltage islands that mainly focused on the architecture
design and IP placement related issues, this paper studies the necessary software compiler support for voltage islands. Specifically,
we focus on an embedded multiprocessor architecture that supports both voltage islands and control domains within these islands, and
determine how an optimizing compiler can automatically map an embedded application onto this architecture. Such an automated
support is critical since it is unrealistic to expect an application programmer to reach a good mapping correlating multiple factors such
as performance and energy at the same time. Our experiments with the proposed compiler support show that our approach is very
effective in reducing energy consumption. The experiments also show that the energy savings we achieve are consistent across a wide
range of values of our major simulation parameters
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