A Breakdown Voltage Multiplier for High Voltage Swing Drivers

A novel breakdown voltage (BV) multiplier is introduced that makes it possible to generate high output voltage swings using transistors with low breakdown voltages. The timing analysis of the stage is used to optimize its dynamic response. A 10 Gb/s optical modulator driver with a differential output voltage swing of 8 V on a 50 Ω load was implemented in a SiGe BiCMOS process. It uses the BV-Doubler topology to achieve output swings twice the collector–emitter breakdown voltage without stressing any single transistor

An Integrated IGBT Active Gate Driver with Fast Feed-Forward Variable Current

The Insulated-Gate Bipolar Transistor (IGBT) is a hybrid of bipolar and MOSFET transistors. As a consequence, IGBTs can handle higher current typical of bipolar transistors with the ease of control typical of MOSFETs. These characteristics make IGBTs desirable for high power Switch Mode Power Supplies (SMPS). In high power systems such as these, devices must be very reliable, as device failures may result in safety hazards such as fires in addition to the failure of the system. Conventional Gate Driver (CGD) circuits typically design for reliability in these systems by including a resistor between the gate driver and gate of the IGBT. This slows the switching waveforms, reducing stress on the IGBT while sacrificing efficiency. This solution is suboptimal, however, and as such Active Gate Drivers (AGD) have been designed to control voltage and current slopes through the IGBT by modulating the gate signal. AGD circuits found on the market today consist of a combination of an CGD with external components to implement the variable current necessary for protection. This requires a large amount of area on a Printed Circuit Board (PCB), and thus can be costly. Therefore, it can be desirable to integrate the AGD functionality into an on-chip system. In this thesis, an AGD is designed, fabricated and analyzed to show that IGBT gate voltage can be controlled in a manner capable of reducing overvoltage, as well as slowed when desired using an on-chip system. The current provided by this gate driver is controlled by feedback signals indicating the switching state of the device, as well as input bits that determine total output current

A monolithically integrated silicon modulator with a 10 Gb/s 5 V pp or 5.6 V pp driver in 0.25 μm SiGe:C BiCMOS

This paper presents as a novelty a fully monolithically integrated 10 Gb/s silicon modulator consisting of an electrical driver plus optical phase modulator in 0.25 μm SiGe:C BiCMOS technology on one chip, where instead of a SOI CMOS process (only MOS transistors) a SiGe BiCMOS process (MOS transistors and fast SiGe bipolar transistors) is implemented. The fastest bipolar transistors in the BiCMOS product line used have a transit frequency of f t ≈ 120 GHz and a collector-emitter breakdown voltage of BV CE0 = 2.2 V (IHP SG25H3). The main focus of this paper will be given to the electronic drivers, where two driver variants are implemented in the test chips. Circuit descriptions and simulations, which treat the influences of noise and bond wires, are presented. Measurements at separate test chips for the drivers show that the integrated driver variant one has a low power consumption in the range of 0.66 to 0.68 W but a high gain of S 21 = 37 dB. From the large signal point of view this driver delivers an inverted as well as a non-inverted output data signal between 0 and 2.5 V (5 V pp differential). Driver variant one is supplied with 2.5 V and with 3.5 V. Bit-error-ratio (BER) measurements resulted in a BER better than 10 −12 for voltage differences of the input data stream down to 50 mV pp . Driver variant two, which is an adapted version of driver variant one, is supplied with 2.5 and 4.2 V, consumes 0.83 to 0.87 W, delivers a differential data signal with 5.6 V pp at the output and has a gain of S 21 = 40 dB. The chip of the fully integrated modulator occupies an area of 12.3 mm 2 due to the photonic components. Measurements with a 240 mV pp electrical input data stream, 1.25 V input common-mode voltage and for an optical input wavelength of 1540 nm resulted in an extinction ratio of 3.3 dB for 1 mm long RF phase shifters in each modulator arm driven by driver variant one and a DC tuning voltage of 1.2 V. The extinction ratio was 8.4 dB at a DC tuning voltage of 7 V for a device with 2 mm long RF phase shifters in each arm and driver variant two

Integrated DC-DC boost converters using CMOS silicon on Sapphire Technology

With the recent advancements in semiconductor manufacturing towards smaller, faster and more efficient microelectronic systems, the problems of increasing leakage current and reduced breakdown voltage in bulk-CMOS transistors have become substantial in the sub-100-nanometer era. The Peregrine UltraCMOS Silicon-on-Sapphire (SOS) technology that uses highly-insulating sapphire substrate as insulator was introduced to meet the continually growing need for higher performance RF products. The electrically isolated circuit elements in the UltraCMOS technology lead to increased switching speeds and lower power consumption due to reduced junction and parasitic capacitances. Furthermore, the growing need for high-speed switching applications such as boosting a lower voltage level to a higher one gives the UltraCMOS technology an upper hand over the bulk-CMOS process. The limitation to using an UltraCMOS transistor is that its maximum drain to source voltage (VDS ) swing is 2.5V. This thesis aims to address this limitation by studying and implementing various stacking techniques in high power switching applications where voltage switching of higher than 2.5V are required. Fully-integrated DC to DC boost converters with switching circuits based on dynamically self-biased stacked transistors are proposed. For high voltage and high power handling, the proposed stacking techniques equally distribute the overall output voltage to less than 2.5V across each stacked transistor in the switch (V DS of 2.5V)

Design and construction of a 12kV D.C. power supply

An experimental work on a modified version of the so-called Cockroft-Walton type voltage multiplying rectifier was carried out. This involved the study of the factors governing the output voltage of the Cockroft-Walton multiplier, designing a multiplier based on these factors that can yield the targeted output voltage of over 10 kV, and the construction of a 12-kV d.c voltage generator. Essentially, the constructed generator is a modified 32-stage Cockroft-Walton type voltage multiplying rectifier. It is suitable as a power supply for the nitrogen laser. It can also be used in particle acceleration. The results of the study of the factors governing the output of the Cockroft-Walton multiplier, the components type and specification, and the construction and performance of the generator are presented and discussed Keywords: Design, Power, Construction, Cockrof

Submillimeter sources for radiometry using high power Indium Phosphide Gunn diode oscillators

A study aimed at developing high frequency millimeter wave and submillimeter wave local oscillator sources in the 60-600 GHz range was conducted. Sources involved both fundamental and harmonic-extraction type Indium Phosphide Gunn diode oscillators as well as varactor multipliers. In particular, a high power balanced-doubler using varactor diodes was developed for 166 GHz. It is capable of handling 100 mW input power, and typically produced 25 mW output power. A high frequency tripler operating at 500 GHz output frequency was also developed and cascaded with the balanced-doubler. A dual-diode InP Gunn diode combiner was used to pump this cascaded multiplier to produce on the order of 0.5 mW at 500 GHz. In addition, considerable development and characterization work on InP Gunn diode oscillators was carried out. Design data and operating characteristics were documented for a very wide range of oscillators. The reliability of InP devices was examined, and packaging techniques to enhance the performance were analyzed. A theoretical study of a new class of high power multipliers was conducted for future applications. The sources developed here find many commercial applications for radio astronomy and remote sensing

Design considerations for a monolithic, GaAs, dual-mode, QPSK/QASK, high-throughput rate transceiver

A monolithic, GaAs, dual mode, quadrature amplitude shift keying and quadrature phase shift keying transceiver with one and two billion bits per second data rate is being considered to achieve a low power, small and ultra high speed communication system for satellite as well as terrestrial purposes. Recent GaAs integrated circuit achievements are surveyed and their constituent device types are evaluated. Design considerations, on an elemental level, of the entire modem are further included for monolithic realization with practical fabrication techniques. Numerous device types, with practical monolithic compatability, are used in the design of functional blocks with sufficient performances for realization of the transceiver

Ultra-Low Leakage, Energy-Efficient Digital Integrated Circuit and System Design

The advances of the complementary metal-oxide-semiconductor (CMOS) technology manufacturing and design over the years have enabled a diverse range of applications across the power consumption, performance, and area (PPA) spectra. Many of the recent and prospective applications rely on the availability of energy-autonomous, miniaturized systems, i.e., ultra-low power (ULP) VLSI systems, which are generally characterized by extreme resource limitations. Some examples of applications are wireless sensing platforms, body-area sensor networks (BASN), biomedical and implantable devices, wearables, hearables, and monitors. Within the context of such applications, the key requirements are long lifetime and miniaturized size (sub-/millimeter-scale). In order to enable both requirements, energy-efficiency is the key metric. It allows for extended battery lifetime and operation with the energy that can be harvested from the environment, and it limits the size (volume) of the energy sources utilized to power these systems. Ultra-low voltage (ULV) operation is a key technique in which the VDD of circuits is reduced from nominal to near or below the threshold voltage of the transistor. It is a powerful knob that has been largely exploited by designers in order to achieve ultra-low power consumption and high energy-efficiency in CMOS. Existing ULP VLSI systems typically operate at a lower supply voltage thereby reducing their energy consumption by one to two orders of magnitude in order to enable the aforementioned applications. While supply voltage scaling is a promising measure for achieving low power and reducing energy consumption, it brings up several challenges. One critical issue is the leakage energy dissipated by the devices, which is magnified in portion to the total energy consumption at ULV. The reason is that, as VDD scales from nominal to near-threshold and sub-threshold, transistors become increasingly slower and they accumulate more leakage (i.e., static) power over longer cycle times. This energy waste accounts for a significant portion of the system's total energy consumption, offsets the gains provided by voltage scaling, defines the minimum energy per operation, and poses a practical limit for the system's energy-efficiency. This thesis presents selected research works on ultra-low leakage, energy-efficient digital integrated circuit design. More specifically, it describes novel and key techniques for minimizing the energy waste of idle/underutilized and always-on hardware. The main goal of such techniques is to push the envelope of energy-efficiency in energy-autonomous, miniaturized VLSI systems. Such techniques are applied to key building blocks of emerging mobile and embedded computing devices resulting in state-of-the-art energy-efficiencies

Design and Implementation of a High Temperature Fully-Integrated BCD-on-SOI Under Voltage Lock Out Circuit

As concern about the environment has grown in recent years, alternatives in the automotive industry have become an important topic for researchers. One alternative being considered is electric vehicles, which utilize electric motors. DC/AC inverters and DC/DC power converters control these electric motors. A logic circuit is needed to power these converters; however, the logic generators inherently operate at a voltage too low to power the motors. A device known as the gate driver is the interface between the logic generators (or microcontroller) and the power devices (power converter). The gate driver provides the power needed to drive the power devices. Circuits are susceptible to voltage and temperature changes though. For this reason, protection circuits must be implemented as an integral part of the gate driver circuits. The Under Voltage Lock Out (UVLO) circuit provides important detection of under voltage conditions in the power supply thus preventing malfunctions. There are multiple power supplies in the gate driver circuit, and it is important to monitor all of these supplies for both surges and reductions in power. If the power supply should drop below the threshold (nominally 80%) there could be issues in the gate driver’s functionality. Since the gate driver will be located under the hood of a hybrid electric vehicles, operating temperatures can reach extremely high values. For this reason, circuit designs must provide reliable operation of the circuits in an extreme environment