Compact Digital Predistortion for Multi-band and Wide-band RF Transmitters

This thesis is focusing on developing a compact digital predistortion (DPD) system which costs less DPD added power consumptions. It explores a new theory and techniques to relieve the requirement of the number of training samples and the sampling-rate of feedback ADCs in DPD systems. A new theory about the information carried by training samples is introduced. It connects the generalized error of the DPD estimation algorithm with the statistical properties of modulated signals. Secondly, based on the proposed theory, this work introduces a compressed sample selection method to reduce the number of training samples by only selecting the minimal samples which satisfy the foreknown probability information. The number of training samples and complex multiplication operations required for coefficients estimation can be reduced by more than ten times without additional calculation resource. Thirdly, based on the proposed theory, this thesis proves that theoretically a DPD system using memory polynomial based behavioural modes and least-square (LS) based algorithms can be performed with any sampling-rate of feedback samples. The principle, implementation and practical concerns of the undersampling DPD which uses lower sampling-rate ADC are then introduced. Finally, the observation bandwidth of DPD systems can be extended by the proposed multi-rate track-and-hold circuits with the associated algorithm. By addressing several parameters of ADC and corresponding DPD algorithm, multi-GHz observation bandwidth using only a 61.44MHz ADC is achieved, and demonstrated the satisfactory linearization performance of multi-band and continued wideband RF transmitter applications via extensive experimental tests

Digital predistortion of RF amplifiers using baseband injection for mobile broadband communications

Radio frequency (RF) power amplifiers (PAs) represent the most challenging design parts of wireless transmitters. In order to be more energy efficient, PAs should operate in nonlinear region where they produce distortion that significantly degrades the quality of signal at transmitter’s output. With the aim of reducing this distortion and improve signal quality, digital predistortion (DPD) techniques are widely used. This work focuses on improving the performances of DPDs in modern, next-generation wireless transmitters. A new adaptive DPD based on an iterative injection approach is developed and experimentally verified using a 4G signal. The signal performances at transmitter output are notably improved, while the proposed DPD does not require large digital signal processing memory resources and computational complexity. Moreover, the injection-based DPD theory is extended to be applicable in concurrent dual-band wireless transmitters. A cross-modulation problem specific to concurrent dual-band transmitters is investigated in detail and novel DPD based on simultaneous injection of intermodulation and cross-modulation distortion products is proposed. In order to mitigate distortion compensation limit phenomena and memory effects in highly nonlinear RF PAs, this DPD is further extended and complete generalised DPD system for concurrent dual-band transmitters is developed. It is clearly proved in experiments that the proposed predistorter remarkably improves the in-band and out-of-band performances of both signals. Furthermore, it does not depend on frequency separation between frequency bands and has significantly lower complexity in comparison with previously reported concurrent dual-band DPDs

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

Low-Complexity Sub-band Digital Predistortion for Spurious Emission Suppression in Noncontiguous Spectrum Access

Noncontiguous transmission schemes combined with high power-efficiency requirements pose big challenges for radio transmitter and power amplifier (PA) design and implementation. Due to the nonlinear nature of the PA, severe unwanted emissions can occur, which can potentially interfere with neighboring channel signals or even desensitize the own receiver in frequency division duplexing (FDD) transceivers. In this article, to suppress such unwanted emissions, a low-complexity sub-band DPD solution, specifically tailored for spectrally noncontiguous transmission schemes in low-cost devices, is proposed. The proposed technique aims at mitigating only the selected spurious intermodulation distortion components at the PA output, hence allowing for substantially reduced processing complexity compared to classical linearization solutions. Furthermore, novel decorrelation based parameter learning solutions are also proposed and formulated, which offer reduced computing complexity in parameter estimation as well as the ability to track time-varying features adaptively. Comprehensive simulation and RF measurement results are provided, using a commercial LTE-Advanced mobile PA, to evaluate and validate the effectiveness of the proposed solution in real world scenarios. The obtained results demonstrate that highly efficient spurious component suppression can be obtained using the proposed solutions

Behavioral modeling and FPGA implementation of digital predistortion for RF and microwave power amplifiers

With the high interest in digital modulation techniques which are very sensitive to the PA nonlinearity, modern wireless communication systems require the usage of linearization techniques to improve the linear behavior of the RF power amplifier. The powerful and cheap digital processing technology makes the digital predistortion (DPD) a competitive candidate for the linearization of the PA. This thesis introduces the basic principle of DPD, its implementation on FPGA and the adaptive DPD system. The linearization of 4 PAs with DPD technique has been introduced: for the hybrid class AB PA operating at 2.6 GHz with a WiMAX testing signal, 33.7 dBm average power, 29.6 % drain efficiency, 13 dB ACPR and 9 dB NMSE improvement have been obtained; for the hybrid Doherty PA operating at 3.4 GHz with an I/Q testing signal, 35.0 dBm average power, 36.8 % drain efficiency, 12 dB ACPR and 13 dB NMSE improvement have been obtained; for the MMIC class AB PA operating at 7 GHz with an I/Q testing signal, 29.4 dBm average power, 25.7 % drain efficiency, 12 dB ACPR and 12 dB NMSE improvement have been obtained; for the two-stage PA operating at 24 GHz with an I/Q testing signal, 23.5 dBm average power, more than 14.0 % drain efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The DPD algorithm has been implemented on FPGA with two methods based on LUT and a direct structure with only adders and multipliers. The block RAM on the FPGA board is chosen as the table in the LUT methods. The linearization performance for these three methods is similar. The test PA is the hybrid Doherty PA mentioned above and the test signal is the I/Q signal with 7.4 dB PAPR. 35.1 dBm average power, 36.8 % efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The cost of logic resources for the direct structure method is the largest with 1,172 flip-flops, while the number of flip-flops for the two LUT methods are 263 and 583, respectively. A new adaptive algorithm has been proposed in this thesis for the adaptive DPD system. This new algorithm improves the performance in extracting the model parameters in complex number domain. With the experimental data from a combined class AB PA, the final accuracy of the model extracted by the new algorithm has been improved from -20 dB to about -40 dB and the converge speed is faster

A fast engineering approach to high efficiency power amplifier linearization for avionics applications

This PhD thesis provides a fast engineering approach to the design of digital predistortion (DPD) linearizers from several perspectives: i) enhancing the off-line training performance of open-loop DPD, ii) providing robustness and reducing the computational complexity of the parameters identification subsystem and, iii) importing machine learning techniques to favor the automatic tuning of power amplifiers (PAs) and DPD linearizers with several free-parameters to maximize power efficiency while meeting the linearity specifications. One of the essential parts of unmanned aerial vehicles (UAV) is the avionics, being the radio control one of the earliest avionics present in the UAV. Unlike the control signal, for transferring user data (such as images, video, etc.) real-time from the drone to the ground station, large transmission rates are required. The PA is a key element in the transmitter chain to guarantee the data transmission (video, photo, etc.) over a long range from the ground station. The more linear output power, the better the coverage or alternatively, with the same coverage, better SNR allows the use of high-order modulation schemes and thus higher transmission rates are achieved. In the context of UAV wireless communications, the power consumption, size and weight of the payload is of significant importance. Therefore, the PA design has to take into account the compromise among bandwidth, output power, linearity and power efficiency (very critical in battery-supplied devices). The PA can be designed to maximize its power efficiency or its linearity, but not both. Therefore, a way to deal with this inherent trade-off is to design high efficient amplification topologies and let the PA linearizers take care of the linearity requirements. Among the linearizers, DPD linearization is the preferred solution to both academia and industry, for its high flexibility and linearization performance. In order to save as many computational and power resources as possible, the implementation of an open-loop DPD results a very attractive solution for UAV applications. This thesis contributes to the PA linearization, especially on off-line training for open-loop DPD, by presenting two different methods for reducing the design and operating costs of an open-loop DPD, based on the analysis of the DPD function. The first method focuses on the input domain analysis, proposing mesh-selecting (MeS) methods to accurately select the proper samples for a computationally efficient DPD parameter estimation. Focusing in the MeS method with better performance, the memory I-Q MeS method is combined with feature extraction dimensionality reduction technique to allow a computational complexity reduction in the identification subsystem by a factor of 65, in comparison to using the classical QR-LS solver and consecutive samples selection. In addition, the memory I-Q MeS method has been proved to be of crucial interest when training artificial neural networks (ANN) for DPD purposes, by significantly reducing the ANN training time. The second method involves the use of machine learning techniques in the DPD design procedure to enlarge the capacity of the DPD algorithm when considering a high number of free parameters to tune. On the one hand, the adaLIPO global optimization algorithm is used to find the best parameter configuration of a generalized memory polynomial behavioral model for DPD. On the other hand, a methodology to conduct a global optimization search is proposed to find the optimum values of a set of key circuit and system level parameters, that properly combined with DPD linearization and crest factor reduction techniques, can exploit at best dual-input PAs in terms of maximizing power efficiency along wide bandwidths while being compliant with the linearity specifications. The advantages of these proposed techniques have been validated through experimental tests and the obtained results are analyzed and discussed along this thesis.Aquesta tesi doctoral proporciona unes pautes per al disseny de linealitzadors basats en predistorsió digital (DPD) des de diverses perspectives: i) millorar el rendiment del DPD en llaç obert, ii) proporcionar robustesa i reduir la complexitat computacional del subsistema d'identificació de paràmetres i, iii) incorporació de tècniques d'aprenentatge automàtic per afavorir l'auto-ajustament d'amplificadors de potència (PAs) i linealitzadors DPD amb diversos graus de llibertat per poder maximitzar l’eficiència energètica i al mateix temps acomplir amb les especificacions de linealitat. Una de les parts essencials dels vehicles aeris no tripulats (UAV) _es l’aviònica, sent el radiocontrol un dels primers sistemes presents als UAV. Per transferir dades d'usuari (com ara imatges, vídeo, etc.) en temps real des del dron a l’estació terrestre, es requereixen taxes de transmissió grans. El PA _es un element clau de la cadena del transmissor per poder garantir la transmissió de dades a grans distàncies de l’estació terrestre. A major potència de sortida, més cobertura o, alternativament, amb la mateixa cobertura, millor relació senyal-soroll (SNR) la qual cosa permet l’ús d'esquemes de modulació d'ordres superiors i, per tant, aconseguir velocitats de transmissió més altes. En el context de les comunicacions sense fils en UAVs, el consum de potència, la mida i el pes de la càrrega útil són de vital importància. Per tant, el disseny del PA ha de tenir en compte el compromís entre ample de banda, potència de sortida, linealitat i eficiència energètica (molt crític en dispositius alimentats amb bateries). El PA es pot dissenyar per maximitzar la seva eficiència energètica o la seva linealitat, però no totes dues. Per tant, per afrontar aquest compromís s'utilitzen topologies amplificadores d'alta eficiència i es deixa que el linealitzador s'encarregui de garantir els nivells necessaris de linealitat. Entre els linealitzadors, la linealització DPD és la solució preferida tant per al món acadèmic com per a la indústria, per la seva alta flexibilitat i rendiment. Per tal d'estalviar tant recursos computacionals com consum de potència, la implementació d'un DPD en lla_c obert resulta una solució molt atractiva per a les aplicacions UAV. Aquesta tesi contribueix a la linealització del PA, especialment a l'entrenament fora de línia de linealitzadors DPD en llaç obert, presentant dos mètodes diferents per reduir el cost computacional i augmentar la fiabilitat dels DPDs en llaç obert. El primer mètode se centra en l’anàlisi de l’estadística del senyal d'entrada, proposant mètodes de selecció de malla (MeS) per seleccionar les mostres més significatives per a una estimació computacionalment eficient dels paràmetres del DPD. El mètode proposat IQ MeS amb memòria es pot combinar amb tècniques de reducció del model del DPD i d'aquesta manera poder aconseguir una reducció de la complexitat computacional en el subsistema d’identificació per un factor de 65, en comparació amb l’ús de l'algoritme clàssic QR-LS i selecció de mostres d'entrenament consecutives. El segon mètode consisteix en l’ús de tècniques d'aprenentatge automàtic pel disseny del DPD quan es considera un gran nombre de graus de llibertat (paràmetres) per sintonitzar. D'una banda, l'algorisme d’optimització global adaLIPO s'utilitza per trobar la millor configuració de paràmetres d'un model polinomial amb memòria generalitzat per a DPD. D'altra banda, es proposa una estratègia per l’optimització global d'un conjunt de paràmetres clau per al disseny a nivell de circuit i sistema, que combinats amb linealització DPD i les tècniques de reducció del factor de cresta, poden maximitzar l’eficiència de PAs d'entrada dual de gran ample de banda, alhora que compleixen les especificacions de linealitat. Els avantatges d'aquestes tècniques proposades s'han validat mitjançant proves experimentals i els resultats obtinguts s'analitzen i es discuteixen al llarg d'aquesta tesi

Design and demonstration of digital pre-distortion using software defined radio

Abstract. High data rates for large number of users set tight requirements for signal quality measured in terms of error vector magnitude (EVM). In radio transmitters, nonlinear distortion dominated by power amplifiers (PAs) often limits the achievable EVM. However, the linearity can be improved by linearization techniques. Digital pre-distortion (DPD) is one of these widely used linearization techniques for an effective distortion reduction over a wide bandwidth. In DPD, the nonlinearity of the transmitter is pre-compensated in the digital domain to achieve linear output. Moreover, DPD is used to enable PAs to operate in the power-efficient region with a decent linearity. As we are moving towards millimetre-wave frequencies to enable the wideband communications, the design of the DPD algorithm must be optimized in terms of performance and power consumption. Moreover, continuous development of wireless infrastructure motivates to make research on programmable and reconfigurable platforms in order to decrease the demonstration cost and time, especially for the demonstration purposes. This thesis illustrates and presents how software defined radio (SDR) platforms can be used to demonstrate DPD. Universal software defined peripheral (USRP) X300 is a commercial software defined radio (SDR) platform. The chosen model, X300, has two independent channels equipped with individual transceiver cards. SIMULINK is used to communicate with the device and the two channels of X300 are used as transmitter and receiver simultaneously in full-duplex mode. Hence, a single USRP device is acting as an operational transmitter and feedback receiver, simultaneously. The implemented USRP design consists of SIMULINK based transceiver design and lookup table based DPD in which the coefficients are calculated in MATLAB offline. An external PA, i.e. ZFL-2000+ together with a directional coupler and attenuator are connected between the TX/RX port and RX2 port to measure the nonlinearity. The nonlinearity transceiver is measured with and without the external PA. The experimental results show decent performance for linearization by using the USRP platform. However, the results differ widely due to the used USRP transceiver parameterization and PA operational point. The 16 QAM test signal with 500 kHz bandwidth is fed to the USRP transmit chain. As an example, the DPD algorithm improves the EVM from 7.6% to 2.1% and also the ACPR is reduced around 10 dB with the 16 QAM input signal where approximately + 2.2 dBm input power applied to the external PA

Behavioral modeling techniques for power amplifier digital pre-distortion

Abstract. The dramatic increase in the capacity of telecommunication networks has increased the requirements of the devices, one example of which is the continuously widening bandwidth. Using broadband signals requires often high linearity from the transmitter — and especially from the power amplifier at the end of the transmitter chain — but at the same time, it should operate as efficiently as possible. The power amplifier is the most power consuming component in the transmitter and inherently nonlinear, so its linearization is an essential part of the overall system performance. Of the current linearization techniques, digital pre-distortion has established itself as the most common tool for providing better linearity and efficiency in a power amplifier and transmitter. In this thesis, the performance of power amplifier models used in digital pre-distortion was investigated and their differences compared to the more complex reference model used in the actual base station product. The aim of this thesis was to create a behavioral model that corresponds the physical component as accurately as the reference model. This behavioral model could be used for example to design and optimize a power amplifier and linearization algorithm without the need for the secret model for the product. This, in its turn, would result in more efficient work with third parties such as component vendors and reduce the linearization time. The performance parameters of the behavioral models were introduced at the beginning of the thesis. These were also used in later parts to analyse the measurement results. Power amplifier linearization measurements were performed under laboratory conditions on a MATLAB® test bench. From the results, it was found that the use of a simple memoryless behavioral model is not enough to describe the physical nonlinear component with sufficient accuracy. The results also showed that the complexity of the model reduces its accuracy if the model coefficients are not correctly positioned. In this thesis, we succeeded in creating a memory model that describes the reference model sufficiently accurately on several meters, taking into account also the memory effects of the power amplifier. This thesis thus provides a good basis for further development of the actual modeling tool for product projects.Tehovahvistimen käyttäytymistason mallinnustekniikat esisärötyksen tueksi. Tiivistelmä. Tietoliikenneverkkojen kapasiteetin räjähdysmäinen kasvu on lisännyt laitteiden vaatimuksia, joista yhtenä esimerkkinä on jatkuvasti suureneva kaistanleveys. Laajakaistaiset signaalit vaativat usein lähettimeltä — ja etenkin lähettimen loppupäässä olevalta tehovahvistimelta — korkeaa lineaarisuutta, mutta samalla sen on toimittava mahdollisimman tehokkaasti. Tehovahvistin on lähettimen eniten tehoa kuluttava komponentti ja luonnostaan epälineaarinen, joten sen linearisointi on oleellinen osa koko systeemin suorituskykyä. Nykyisistä linearisointitekniikoista digitaalinen esisärötys on vakiinnuttanut paikkansa yleisimpänä työkaluna paremman lineaarisuuden ja tehokkuuden saavuttamiseksi tehovahvistimessa. Tässä diplomityössä tutkittiin digitaalisessa esisärötyksessä käytettävien käyttäytymistason tehovahvistinmallien suorituskykyjä ja niiden eroja varsinaisessa tukiasematuotteessa käytettävään, monimutkaisempaan referenssimalliin verrattuna. Työn tavoitteena oli luoda käyttäytymismalli, jolla voidaan kuvata fyysistä komponenttia yhtä tarkasti kuin referenssimallilla. Mallia voitaisiin käyttää esimerkiksi uuden tehovahvistimen suunnittelussa ilman, että kaupalliseen tuotteeseen tulevaa, salaista referenssimallia on tarve käyttää. Näin voitaisiin tehostaa työskentelyä ulkopuolisten tahojen, kuten komponenttitoimittajien kanssa ja vähentää linearisointiin käytettävää aikaa. Työn alussa esiteltiin käyttäytymismallien suorituskykyparametrit, joita käytettiin mittaustulosten analysointiin. Tehovahvistimien linearisointimittaukset suoritettiin laboratorio-olosuhteissa MATLAB®-testipenkissä. Mittauksissa todettiin, että yksinkertainen, muistiton käyttäytymismalli ei riitä kuvaamaan fyysistä komponenttia riittävän tarkasti. Tuloksista pääteltiin myös, että liian kompleksinen malli heikentää sen tarkkuutta. Työssä onnistuttiin luomaan muistillinen käyttäytymismalli, joka kuvaa referenssimallia riittävän tarkasti usealla eri mittarilla tarkastellen — huomioiden osaltaan myös tehovahvistimen muistiefektejä. Tämä opinnäytetyö tarjoaa siis hyvän pohjan varsinaisen mallinnustyökalun jatkokehitykselle tuoteprojekteihin

Transformer NN-based behavioral modeling and predistortion for wideband pas

Abstract. This work investigates the suitability of transformer neural networks (NNs) for behavioral modeling and the predistortion of wideband power amplifiers. We propose an augmented real-valued time delay transformer NN (ARVTDTNN) model based on a transformer encoder that utilizes the multi-head attention mechanism. The inherent parallelized computation nature of transformers enables faster training and inference in the hardware implementation phase. Additionally, transformers have the potential to learn complex nonlinearities and long-term memory effects that will appear in future high-bandwidth power amplifiers. The experimental results based on 100 MHz LDMOS Doherty PA show that the ARVTDTNN model exhibits superior or comparable performance to the state-of-the-art models in terms of normalized mean square error (NMSE) and adjacent channel power ratio (ACPR). It improves the NMSE and ACPR up to −37.6 dB and −41.8 dB, respectively. Moreover, this approach can be considered as a generic framework to solve sequence-to-one regression problems with the transformer architecture