Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.

A Label Free CMOS-Based Smart Petri Dish for Cellular Analysis

RÉSUMÉ Le dépistage de culture cellulaire à haut débit est le principal défi pour une variété d’applications des sciences de la vie, y compris la découverte de nouveaux médicaments et le suivi de la cytotoxicité. L’analyse classique de culture cellulaire est généralement réalisée à l’aide de techniques microscopiques non-intégrées avec le système de culture cellulaire. Celles-ci sont laborieuses spécialement dans le cas des données recueillies en temps réel ou à des fins de surveillance continue. Récemment, les micro-réseaux cellulaires in-vitro ont prouvé de nombreux avantages dans le domaine de surveillance des cellules en réduisant les coûts, le temps et la nécessité d’études sur des modèles animaux. Les microtechniques, y compris la microélectronique et la microfluidique,ont été récemment utilisé dans la biotechnologie pour la miniaturisation des systèmes biologiques et analytiques. Malgré les nombreux efforts consacrés au développement de dispositifs microfluidiques basés sur les techniques de microscopie optique, le développement de capteurs intégrés couplés à des micropuits pour le suivi des paramètres cellulaires tel que la viabilité, le taux de croissance et cytotoxicité a été limité. Parmi les différentes méthodes de détection disponibles, les techniques capacitives offrent une plateforme de faible complexité. Celles-ci ont été considérablement utilisées afin d’étudier l’interaction cellule-surface. Ce type d’interaction est le plus considéré dans la majorité des études biologiques. L’objectif de cette thèse est de trouver des nouvelles approches pour le suivi de la croissance cellulaire et la surveillance de la cytotoxicité à l’aide d’un réseau de capteurs capacitifs entièrement intégré. Une plateforme hybride combinant un circuit microélectronique et une structure microfluidique est proposée pour des applications de détection de cellules et de découverte de nouveaux médicaments. Les techniques biologiques et chimiques nécessaires au fonctionnement de cette plateforme sont aussi proposées. La technologie submicroniques Standard complementary metal-oxide-Semiconductor (CMOS) (TSMC 0.35 μm) est utilisée pour la conception du circuit microélectronique de cette plateforme. En outre, les électrodes sont fabriquées selon le processus CMOS standard sans la nécessité d’étapes de post-traitement supplémentaires. Ceci rend la plateforme proposée unique par rapport aux plateformes de dépistage de culture cellulaire à haut débit existantes. Plusieurs défis ont été identifiés durant le développement de cette plateforme comme la sensibilité, la bio-compatibilité et la stabilité et les solutions correspondantes sont fournies.----------ABSTRACT High throughput cell culture screening is a key challenge for a variety of life science applications, including drug discovery and cytotoxicity monitoring. Conventional cell culture analysis is widely performed using microscopic techniques that are not integrated into the target cell culture system. Additionally, these techniques are too laborious in particular to be used for real-time and continuous monitoring purposes. Recently, it has been proved that invitro cell microarrays offer great advantages for cell monitoring applications by reducing cost, time, and the need for animal model studies. Microtechnologies, including microelectronics and microfluidics, have been recently used in biotechnology for miniaturization of biological and analytical systems. Despite many efforts in developing microfluidic devices using optical microscopy techniques, less attention have been paid on developing fully integrated sensors for monitoring cell parameters such as viability, growth rate, and cytotoxicity. Among various available sensing methods, capacitive techniques offer low complexity platforms. This technique has significantly attracted attentions for the study of cell-surface interaction which is widely considered in biological studies. This thesis focuses on new approaches for cell growth and cytotoxicity monitoring using a fully integrated capacitive sensor array. A hybrid platform combining microelectronic circuitry and microfluidic structure is proposed along with other required biological and chemical techniques for single cell detection and drug discovery applications. Standard submicron complementary metal–oxide–semiconductor (CMOS) technology (TSMC 0.35 μm) is used to develop the microelectronic part of this platform. Also, the sensing electrodes are fabricated in standard CMOS process without the need for any additional post processing step, which makes the proposed platform unique compared to other state of the art high throughput cell assays. Several challenges in implementing this platform such as sensitivity, bio-compatibility, and stability are discussed and corresponding solutions are provided. Specifically, a new surface functionalization method based on polyelectrolyte multilayers deposition is proposed to enhance cell-electrode adherence and to increase sensing electrodes’ life time. In addition, a novel technique for microwell fabrication and its integration with the CMOS chip is proposed to allow parallel screening of cells. With the potential to perform inexpensive, fast, and real-time cell analyses, the proposed platform opens up the possibility to transform from passive traditional cell assays to a smart on-line monitoring system

A Current-Mode Multi-Channel Integrating Analog-to-Digital Converter

Multi-channel analog to digital converters (ADCs) are required where signals from multiple sensors can be digitized. A lower power per channel for such systems is important in order that when the number of channels is increased the power does not increase drastically. Many applications require signals from current output sensors, such as photosensors and photodiodes to be digitized. Applications for these sensors include spectroscopy and imaging. The ability to digitize current signals without converting currents to voltages saves power, area, and the design time required to implement I-to-V converters. This work describes a novel and unique current-mode multi-channel integrating ADC which processes current signals from sensors and converts it to digital format. The ADC facilitates the processing of current analog signals without the use of transconductors. An attempt has been made also to incorporate voltage-mode techniques into the current-mode design so that the advantages of both techniques can be utilized to augment the performance of the system. Additionally since input signals are in the form of currents, the dynamic range of the ADC is less dependant on the supply voltage. A prototype 4-channel ADC design was fabricated in a 0.5-micron bulk CMOS process. The measurement results for a 10Ksps sampling rate include a DNL, which is less than 0.5 LSB, and a power consumption of less than 2mW per channel

Nano-Watt Modular Integrated Circuits for Wireless Neural Interface.

In this work, a nano-watt modular neural interface circuit is proposed for ECoG neuroprosthetics. The main purposes of this work are threefold: (1) optimizing the power-performance of the neural interface circuits based on ECoG signal characteristics, (2) equipping a stimulation capability, and (3) providing a modular system solution to expand functionality. To achieve these aims, the proposed system introduces the following contributions/innovations: (1) power-noise optimization based on the ECoG signal driven analysis, (2) extreme low-power analog front-ends, (3) Manchester clock-edge modulation clock data recovery, (4) power-efficient data compression, (5) integrated stimulator with fully programmable waveform, (6) wireless signal transmission through skin, and (7) modular expandable design. Towards these challenges and contributions, three different ECoG neural interface systems, ENI-1, ENI-16, and ENI-32, have been designed, fabricated, and tested. The first ENI system(ENI-1) is a one-channel analog front-end and fabricated in a 0.25µm CMOS process with chopper stabilized pseudo open-loop preamplifier and area-efficient SAR ADC. The measured channel power, noise and area are 1.68µW at 2.5V power-supply, 1.69µVrms (NEF=2.43), and 0.0694mm^2, respectively. The fabricated IC is packaged with customized miniaturized package. In-vivo human EEG is successfully measured with the fabricated ENI-1-IC. To demonstrate a system expandability and wireless link, ENI-16 IC is fabricated in 0.25µm CMOS process and has sixteen channels with a push-pull preamplifier, asynchronous SAR ADC, and intra-skin communication(ISCOM) which is a new way of transmitting the signal through skin. The measured channel power, noise and area are 780nW, 4.26µVrms (NEF=5.2), and 2.88mm^2, respectively. With the fabricated ENI-16-IC, in-vivo epidural ECoG from monkey is successfully measured. As a closed-loop system, ENI-32 focuses on optimizing the power performance based on a bio-signal property and integrating stimulator. ENI-32 is fabricated in 0.18µm CMOS process and has thirty-two recording channels and four stimulation channels with a cyclic preamplifier, data compression, asymmetric wireless transceiver (Tx/Rx). The measured channel power, noise and area are 140nW (680nW including ISCOM), 3.26µVrms (NEF=1.6), and 5.76mm^2, respectively. The ENI-32 achieves an order of magnitude power reduction while maintaining the system performance. The proposed nano-watt ENI-32 can be the first practical wireless closed-loop solution with a practically miniaturized implantable device.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/98064/1/schang_1.pd

Robust low power CMOS methodologies for ISFETs instrumentation

I have developed a robust design methodology in a 0.18 [Mu]m commercial CMOS process to circumvent the performance issues of the integrated Ions Sensitive Field Effect Transistor (ISFET) for pH detection. In circuit design, I have developed frequency domain signal processing, which transforms pH information into a frequency modulated signal. The frequency modulated signal is subsequently digitized and encoded into a bit-stream of data. The architecture of the instrumentation system consists of a) A novel front-end averaging amplifier to interface an array of ISFETs for converting pH into a voltage signal, b) A high linear voltage controlled oscillator for converting the voltage signal into a frequency modulated signal, and c) Digital gates for digitizing and differentiating the frequency modulated signal into an output bit-stream. The output bit stream is indistinguishable to a 1st order sigma delta modulation, whose noise floor is shaped by +20dB/decade. The fabricated instrumentation system has a dimension of 1565 [Mu] m 1565 [Mu] m. The chip responds linearly to the pH in a chemical solution and produces a digital output, with up to an 8-bit accuracy. Most importantly, the fabricated chips do not need any post-CMOS processing for neutralizing any trapped-charged effect, which can modulate on-chip ISFETs’ threshold voltages into atypical values. As compared to other ISFET-related works in the literature, the instrumentation system proposed in this thesis can cope with the mismatched ISFETs on chip for analogue-to-digital conversions. The design methodology is thus very accurate and robust for chemical sensing

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes

Bidirectional neural interfaces are tools designed to “communicate” with the brain via recording and modulation of neuronal activity. The bidirectional interface systems have been adopted for many applications. Neuroscientists employ them to map neuronal circuits through precise stimulation and recording. Medical doctors deploy them as adaptable medical devices which control therapeutic stimulation parameters based on monitoring real-time neural activity. Brain-machine-interface (BMI) researchers use neural interfaces to bypass the nervous system and directly control neuroprosthetics or brain-computer-interface (BCI) spellers. In bidirectional interfaces, the implantable transducers as well as the corresponding electronic circuits and systems face several challenges. A high channel count, low power consumption, and reduced system size are desirable for potential chronic deployment and wider applicability. Moreover, a neural interface designed for robust closed-loop operation requires the mitigation of stimulation artifacts which corrupt the recorded signals. This dissertation introduces several techniques targeting low power consumption, small size, and reduction of stimulation artifacts. These techniques are implemented for extracellular electrophysiological recording and two stimulation modalities: direct current stimulation for closed-loop control of seizure detection/quench and optical stimulation for optogenetic studies. While the two modalities differ in their mechanisms, hardware implementation, and applications, they share many crucial system-level challenges. The first method aims at solving the critical issue of stimulation artifacts saturating the preamplifier in the recording front-end. To prevent saturation, a novel mixed-signal stimulation artifact cancellation circuit is devised to subtract the artifact before amplification and maintain the standard input range of a power-hungry preamplifier. Additional novel techniques have been also implemented to lower the noise and power consumption. A common average referencing (CAR) front-end circuit eliminates the cross-channel common mode noise by averaging and subtracting it in analog domain. A range-adapting SAR ADC saves additional power by eliminating unnecessary conversion cycles when the input signal is small. Measurements of an integrated circuit (IC) prototype demonstrate the attenuation of stimulation artifacts by up to 42 dB and cross-channel noise suppression by up to 39.8 dB. The power consumption per channel is maintained at 330 nW, while the area per channel is only 0.17 mm2. The second system implements a compact headstage for closed-loop optogenetic stimulation and electrophysiological recording. This design targets a miniaturized form factor, high channel count, and high-precision stimulation control suitable for rodent in-vivo optogenetic studies. Monolithically integrated optoelectrodes (which include 12 µLEDs for optical stimulation and 12 electrical recording sites) are combined with an off-the-shelf recording IC and a custom-designed high-precision LED driver. 32 recording and 12 stimulation channels can be individually accessed and controlled on a small headstage with dimensions of 2.16 x 2.38 x 0.35 cm and mass of 1.9 g. A third system prototype improves the optogenetic headstage prototype by furthering system integration and improving power efficiency facilitating wireless operation. The custom application-specific integrated circuit (ASIC) combines recording and stimulation channels with a power management unit, allowing the system to be powered by an ultra-light Li-ion battery. Additionally, the µLED drivers include a high-resolution arbitrary waveform generation mode for shaping of µLED current pulses to preemptively reduce artifacts. A prototype IC occupies 7.66 mm2, consumes 3.04 mW under typical operating conditions, and the optical pulse shaping scheme can attenuate stimulation artifacts by up to 3x with a Gaussian-rise pulse rise time under 1 ms.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147674/1/mendrela_1.pd

VLSI Circuits for Bidirectional Neural Interfaces

Medical devices that deliver electrical stimulation to neural tissue are important clinical tools that can augment or replace pharmacological therapies. The success of such devices has led to an explosion of interest in the field, termed neuromodulation, with a diverse set of disorders being targeted for device-based treatment. Nevertheless, a large degree of uncertainty surrounds how and why these devices are effective. This uncertainty limits the ability to optimize therapy and gives rise to deleterious side effects. An emerging approach to improve neuromodulation efficacy and to better understand its mechanisms is to record bioelectric activity during stimulation. Understanding how stimulation affects electrophysiology can provide insights into disease, and also provides a feedback signal to autonomously tune stimulation parameters to improve efficacy or decrease side-effects. The aims of this work were taken up to advance the state-of-the-art in neuro-interface technology to enable closed-loop neuromodulation therapies. Long term monitoring of neuronal activity in awake and behaving subjects can provide critical insights into brain dynamics that can inform system-level design of closed-loop neuromodulation systems. Thus, first we designed a system that wirelessly telemetered electrocorticography signals from awake-behaving rats. We hypothesized that such a system could be useful for detecting sporadic but clinically relevant electrophysiological events. In an 18-hour, overnight recording, seizure activity was detected in a pre-clinical rodent model of global ischemic brain injury. We subsequently turned to the design of neurostimulation circuits. Three critical features of neurostimulation devices are safety, programmability, and specificity. We conceived and implemented a neurostimulator architecture that utilizes a compact on-chip circuit for charge balancing (safety), digital-to-analog converter calibration (programmability) and current steering (specificity). Charge balancing accuracy was measured at better than 0.3%, the digital-to-analog converters achieved 8-bit resolution, and physiological effects of current steering stimulation were demonstrated in an anesthetized rat. Lastly, to implement a bidirectional neural interface, both the recording and stimulation circuits were fabricated on a single chip. In doing so, we implemented a low noise, ultra-low power recording front end with a high dynamic range. The recording circuits achieved a signal-to-noise ratio of 58 dB and a spurious-free dynamic range of better than 70 dB, while consuming 5.5 μW per channel. We demonstrated bidirectional operation of the chip by recording cardiac modulation induced through vagus nerve stimulation, and demonstrated closed-loop control of cardiac rhythm