A -5 dBm 400MHz OOK Transmitter for Wireless Medical Application

A 400 MHz high efficiency transmitter forwireless medical application is presented in this paper. Transmitter architecture with high-energy efficiencies isproposed to achieve high data rate with low powerconsumption. In the on-off keying transmitters, the oscillatorand power amplifier are turned off when the transmittersends 0 data. The proposed class-e power amplifier has highefficiency for low level output power. The proposed on-offkeying transmitter consumes 1.52 mw at -5 dBm output by 40Mbps data rate and energy consumption 38 pJ/bit. Theproposed transmitter has been designed in 0.18µm CMOStechnology

Microwave class-E power amplifiers: a brief review of essential concepts in high-frequency class-E PAs and related circuits

Since Nathan Sokal's invention of the class-E power amplifier (PA), the vast majority of class-E results have been reported at kilohertz and millihertz frequencies, but the concept is increasingly applied in the ultrahigh-frequency (UHF) [1]-[13], microwave [14]-[20], and even millimeter-wave range [21]. The goal of this article is to briefly review some interesting concepts concerning high-frequency class-E PAs and related circuits. (The article on page 26 of this issue, "A History of Switching-Mode Class-E Techniques" by Andrei Grebennikov and Frederick H. Raab, provides a historical overview of class-E amplifier development.)We acknowledge support, in part, by a Lockheed Martin Endowed Chair at the University of Colorado and in part by the Spanish Ministry of Economy, Industry, and Competitiveness (MINECO) through TEC2014-58341-C4-1-R and TEC2017-83343-C4-1-R projects, cofunded with FEDER

A 30.5 dBm 48% PAE CMOS class-E PA with integrated balun for RF applications

Integration of the power amplifier together with signal processing in a transmitter is still missing in demanding RF commercial products. Issues preventing PA integration include LO pulling phenomena, thermal dissipation, and power efficiency. In this work we investigate high efficiency watt range Class-E PAs and integrated baluns. In particular, insights in the design of a fully differential cascode topology for high efficiency and reliable operation are provided and a narrowband lumped element balun, employing minimum number of integrated inductors for minimum power loss, is introduced. Two versions have been manufacturedusing a 0.13 m CMOS technology. The first comprises the driver, and a differential PA connected to an external low-loss commercial balun. Experiments prove 31 dBm delivered output power, with 58% PAE and 67% drain efficiency, at 1.7 GHz. The second version adopts the same driver and PA and also integrates the balun. Experiments prove 30.5 dBm delivered output power, with 48% PAE and 55% drain efficiency, at 1.6 GHz

Survey on individual components for a 5 GHz receiver system using 130 nm CMOS technology

La intención de esta tesis es recopilar información desde un punto de vista general sobre los diferentes tipos de componentes utilizados en un receptor de señales a 5 GHz utilizando tecnología CMOS. Se ha realizado una descripción y análisis de cada uno de los componentes que forman el sistema, destacando diferentes tipos de configuraciones, figuras de mérito y otros parámetros. Se muestra una tabla resumen al final de cada sección, comparando algunos diseños que se han ido presentando a lo largo de los años en conferencias internacionales de la IEEE.The intention of this thesis is to gather information from an overview point about the different types of components used in a 5 GHz receiver using CMOS technology. A review of each of the components that form the system has been made, highlighting different types of configurations, figure of merits and parameters. A summary table is shown at the end of each section, comparing many designs that have been presented over the years at international conferences of the IEEE.Departamento de Ingeniería Energética y FluidomecánicaGrado en Ingeniería en Electrónica Industrial y Automátic

Energy Efficient RF Transmitter Design using Enhanced Breakdown Voltage SOI-CMOS Compatible MESFETs

abstract: The high cut-off frequency of deep sub-micron CMOS technologies has enabled the integration of radio frequency (RF) transceivers with digital circuits. However, the challenging point is the integration of RF power amplifiers, mainly due to the low breakdown voltage of CMOS transistors. Silicon-on-insulator (SOI) metal semiconductor field effect transistors (MESFETs) have been introduced to remedy the limited headroom concern in CMOS technologies. The MESFETs presented in this thesis have been fabricated on different SOI-CMOS processes without making any change to the standard fabrication steps and offer 2-30 times higher breakdown voltage than the MOSFETs on the same process. This thesis explains the design steps of high efficiency and wideband RF transmitters using the proposed SOI-CMOS compatible MESFETs. This task involves DC and RF characterization of MESFET devices, along with providing a compact Spice model for simulation purposes. This thesis presents the design of several SOI-MESFET RF power amplifiers operating at 433, 900 and 1800 MHz with ~40% bandwidth. Measurement results show a peak power added efficiency (PAE) of 55% and a peak output power of 22.5 dBm. The RF-PAs were designed to operate in Class-AB mode to minimize the linearity degradation. Class-AB power amplifiers lead to poor power added efficiency, especially when fed with signals with high peak to average power ratio (PAPR) such as wideband code division multiple access (W-CDMA). Polar transmitters have been introduced to improve the efficiency of RF-PAs at backed-off powers. A MESFET based envelope tracking (ET) polar transmitter was designed and measured. A low drop-out voltage regulator (LDO) was used as the supply modulator of this polar transmitter. MESFETs are depletion mode devices; therefore, they can be configured in a source follower configuration to have better stability and higher bandwidth that MOSFET based LDOs. Measurement results show 350 MHz bandwidth while driving a 10 pF capacitive load. A novel polar transmitter is introduced in this thesis to alleviate some of the limitations associated with polar transmitters. The proposed architecture uses the backgate terminal of a partially depleted transistor on SOI process, which relaxes the bandwidth and efficiency requirements of the envelope amplifier in a polar transmitter. The measurement results of the proposed transmitter demonstrate more than three times PAE improvement at 6-dB backed-off output power, compared to the traditional RF transmitters.Dissertation/ThesisPh.D. Electrical Engineering 201

A TRANSCEIVER DESIGN FOR IMPLANTABLE MEDICAL DEVICES

Master'sMASTER OF ENGINEERIN

Design of Low-Power Short-Distance Transceiver for Wireless Sensor Networks

Ph.DDOCTOR OF PHILOSOPH