Low-Power High-Data-Rate Transmitter Design for Biomedical Application

Ph.DDOCTOR OF PHILOSOPH

High Performance Local Oscillator Design for Next Generation Wireless Communication

Local Oscillator (LO) is an essential building block in modern wireless radios. In modern wireless radios, LO often serves as a reference of the carrier signal to modulate or demod- ulate the outgoing or incoming data. The LO signal should be a clean and stable source, such that the frequency or timing information of the carrier reference can be well-defined. However, as radio architecture evolves, the importance of LO path design has become much more important than before. Of late, many radio architecture innovations have exploited sophisticated LO generation schemes to meet the ever-increasing demands of wireless radio performances. The focus of this thesis is to address challenges in the LO path design for next-generation high performance wireless radios. These challenges include (1) Congested spectrum at low radio frequency (RF) below 5GHz (2) Continuing miniaturization of integrated wireless radio, and (3) Fiber-fast (>10Gb/s) mm-wave wireless communication. The thesis begins with a brief introduction of the aforementioned challenges followed by a discussion of the opportunities projected to overcome these challenges. To address the challenge of congested spectrum at frequency below 5GHz, novel ra- dio architectures such as cognitive radio, software-defined radio, and full-duplex radio have drawn significant research interest. Cognitive radio is a radio architecture that opportunisti- cally utilize the unused spectrum in an environment to maximize spectrum usage efficiency. Energy-efficient spectrum sensing is the key to implementing cognitive radio. To enable energy-efficient spectrum sensing, a fast-hopping frequency synthesizer is an essential build- ing block to swiftly sweep the carrier frequency of the radio across the available spectrum. Chapter 2 of this thesis further highlights the challenges and trade-offs of the current LO gen- eration scheme for possible use in sweeping LO-based spectrum analysis. It follows by intro- duction of the proposed fast-hopping LO architecture, its implementation and measurement results of the validated prototype. Chapter 3 proposes an embedded phase-shifting LO-path design for wideband RF self-interference cancellation for full-duplex radio. It demonstrates a synergistic design between the LO path and signal to perform self-interference cancellation. To address the challenge of continuing miniaturization of integrated wireless radio, ring oscillator-based frequency synthesizer is an attractive candidate due to its compactness. Chapter 4 discussed the difficulty associated with implementing a Phase-Locked Loop (PLL) with ultra-small form-factor. It further proposes the concept sub-sampling PLL with time- based loop filter to address these challenges. A 65nm CMOS prototype and its measurement result are presented for validation of the concept. In shifting from RF to mm-wave frequencies, the performance of wireless communication links is boosted by significant bandwidth and data-rate expansion. However, the demand for data-rate improvement is out-pacing the innovation of radio architectures. A >10Gb/s mm-wave wireless communication at 60GHz is required by emerging applications such as virtual-reality (VR) headsets, inter-rack data transmission at data center, and Ultra-High- Definition (UHD) TV home entertainment systems. Channel-bonding is considered to be a promising technique for achieving >10Gb/s wireless communication at 60GHz. Chapter 5 discusses the fundamental radio implementation challenges associated with channel-bonding for 60GHz wireless communication and the pros and cons of prior arts that attempted to address these challenges. It is followed by a discussion of the proposed 60GHz channel- bonding receiver, which utilizes only a single PLL and enables both contiguous and non- contiguous channel-bonding schemes. Finally, Chapter 6 presents the conclusion of this thesis

Modelling and performance analysis of multigigabit serial interconnects using real number based analog verification methods

The increasing importance of multigigabit transceiver circuits in modern chip design calls for new methods of analyzing and integrating these challenging building blocks. This work presents a design and analysis framework basend on the SystemVerilog real number modeling ansatz. It further extends the simulation possibilities thus obtained by introducing additional higher level numeric modelling and evaluation methods to support multigigabit statistical link budgeting procedures based on the Peak Distortion Algorithm

Low power VCO-based analog-to-digital conversion

textThis dissertation presents novel two stage ADC architecture with a VCO based second stage. With the scaling of the supply voltages in modern CMOS process it is difficult to design high gain operational amplifiers needed for traditional voltage domain two-stage analog to digital converters. However time resolution continues to improve with the advancement in CMOS technology making VCO-based ADC more attractive. The nonlinearity in voltage-to-frequency transfer function is the biggest challenge in design of VCO based ADC. The hybrid approach used in this work uses a voltage domain first stage to determine the most significant bits and uses a VCO based second stage to quantize the small residue obtained from first stage. The architecture relaxes the gain requirement on the the first stage opamp and also relaxes the linearity requirements on the second stage VCO. The prototype ADC built in 65nm CMOS process achieves 63.7dB SNDR in 10MHz bandwidth while only consuming 1.1mW of power. The performance of the prototype chip is comparable to the state-of-art in terms of figure-of-merit but this new architecture uses significantly less circuit area.Electrical and Computer Engineerin

Time-Mode Analog Circuit Design for Nanometric Technologies

Rapid scaling in technology has introduced new challenges in the realm of traditional analog design. Scaling of supply voltage directly impacts the available voltage-dynamic-range. On the other hand, nanometric technologies with fT in the hundreds of GHz range open opportunities for time-resolution-based signal processing. With reduced available voltage-dynamic-range and improved timing resolution, it is more convenient to devise analog circuits whose performance depends on edge-timing precision rather than voltage levels. Thus, instead of representing the data/information in the voltage-mode, as a difference between two node voltages, it should be represented in time-mode as a time-difference between two rising and/or falling edges. This dissertation addresses the feasibility of employing time-mode analog circuit design in different applications. Specifically: 1) Time-mode-based quanitzer and feedback DAC of SigmaDelta ADC. 2) Time-mode-based low-THD 10MHz oscillator, 3) A Spur-Frequency Boosting PLL with -74dBc Reference-Spur Rejection in 90nm Digital CMOS. In the first project, a new architectural solution is proposed to replace the DAC and the quantizer by a Time-to-Digital converter. The architecture has been fabricated in 65nm and shows that this technology node is capable of achieving a time-matching of 800fs which has never been reported. In addition, a competitive figure-of-merit is achieved. In the low-THD oscillator, I proposed a new architectural solution for synthesizing a highly-linear sinusoidal signal using a novel harmonic rejection approach. The chip is fabricated in 130nm technology and shows an outstanding performance compared to the state of the art. The designed consumes 80% less power; consumes less area; provides much higher amplitude while being composed of purely digital circuits and passive elements. Last but not least, the spur-frequency boosting PLL employs a novel technique that eliminates the reference spurs. Instead of adding additional filtering at the reference frequency, the spur frequency is boosted to higher frequency which is, naturally, has higher filtering effects. The prototype is fabricated in 90nm digital CMOS and proved to provide the lowest normalized reference spurs ever reported

ATS F and G /phases B and C/, volume 1 Final report

Design parameters and program objectives of Applications Technology Satellites 7 and

Ultra-low power RF receiver based on double-gate CMOS FinFET technology

In this research, design approaches and methodologies were presented to realize the ultra-low power RF receiver front-end circuits. Moderate inversion operation was explored as a possible method of reducing power consumption along with the use of low supply voltage. The research is firstly concentrated on passive and active devices modeling. One of the most commonly used passive devices is on-chip inductor. On-chip spiral inductor model was developed firstly. Compared to the model developed by others, this model can predict the behavior of the inductors with different structural parameters over a board frequency range (from 0.1 to 10 GHz). Then the SOI varactor model was developed based on our measurement and extraction.Besides the passive devices modeling, a new most promising MOSFET candidate, FinFET, was characterized at GHz frequency range. Based on the measurement results, we found the FinFET transistors did have superior performance over bulk-Si CMOS technology. And an RF circuit model of FinFET was developed followed that, which was published in Electronics Letters. To my best knowledge, this was the first RF FinFET model published world wide at that time. It provides the basic idea about how to model this new structure MOSFET.Based on the passive and active device models developed, Global Positioning System (GPS) receiver front end circuits were designed and measured. Comparing to the previous designs with the same constrains, the ultra-low power GPS receiver building block circuits in this research have much less power consumption than the best design published before

New photonic architectures and devices for generation and detection of sub-THz and THz waves

The development of high-quality and reliable devices in the THz frequency region to fill the existing technological gap has become a major concern. This is chiefly motivated by the need of a widespread exploitation of the extensive variety of identified applications in this frequency region by a wide range of users, including the non-scientific community. The photonic approaches used for these purposes offer important and exclusive advantages over other existing alternatives, which have as a main representative the all-electronic technology, especially in terms of frequency range coverage, possibility of photonic distribution using optical fibers, weight and Electromagnetic Interference (EMI) immunity. Nevertheless, the optical techniques have traditionally provided with worse performance in terms of phase noise, tunability and dynamic range (in generation), and conversion ratio (in detection) when compared to state-of-theart all-electronic THz technology. The work accomplished in this thesis focuses on the design, development and validation of new photonic architectures and devices for both generation and detection of sub-THz and THz waves which overcome the drawbacks of optical techniques at this frequency region while maintaining all their advantages. In this thesis, several photonic sub-THz and THz generation systems have been developed using Difference Frequency Generation (DFG) architectures in which the DFG source is provided by an Optical Frequency Comb Generator (OFCG) and optical mode selection. Different devices and techniques are investigated for each part of the system before arriving to the final high performance synthesizer. Passively Mode-Locked Laser Diodes (PMMLDs) are firstly evaluated as integrated OFCG. An improved design of the OFCG is achieved with a scheme based on a Discrete Mode (DM) laser under Gain- Switching (GS) regime and optical span expansion by the use of a single Electro- Optical (EO) phase modulator. As optical mode selection, both high selective optical filtering and Optical Injection Locking (OIL) are used and evaluated. A commercial 50 GHz photodiode (PD) and an n-i-pn-i-p superlattice THz photomixer are employed as photodetector for Optical to THz conversion. The final reported system consists on an OFCG based on GS, OIL as mode selection strategy and an n-i-pn-i-p superlattice photomixer. This synthesizer offers a wide frequency range (60-140 GHz), readily scalable to a range between 10 GHz and values well above 1 THz. Quasi-continuous tunability is offered in the whole frequency range, with a frequency resolution of 0.1 Hz at 100 GHz that can be straightforwardly improved to 0.01 Hz at 100 GHz and 0.1 Hz at 1 THz. The measured FWHM at 120 GHz is <10 Hz, only limited by the measurement instrumentation. The system offers excellent frequency and power stability with frequency and power deviations over 1 hour of 5 Hz and 1.5 dB, respectively. These values are also limited by both the accuracy and uncertainty of the measurement setup. The performance achieved by this photonic sub-THz and THz synthesizer for most figures of merit matches or even surpasses those of commercial stateof- the-art all-electronic systems, and overcomes some of their characteristics in more than one million times when compared to commercial state-of-the-art photonic solutions. The detection part of this thesis explores the use of photonic architectures based on EO heterodyne receivers and the key devices that encompass these architectures: photonic Local Oscillators (LOs) and EO mixers. First results are developed at microwave frequencies (<15 GHz) using an Ultra-Nonlinear Semiconductor Amplifier (XN-SOA) as EO mixer and a GS based photonic LO. It is demonstrated how this LO device based on GS provides with a significant improvement in the performance of the overall EO receiver when compared to a traditional linearly modulated LO. Furthermore, this detection architecture is validated in an actual application (photonic imaging array), featuring scalability, flexibility and reasonable conversion ratios. After this, an EO heterodyne receiver is demonstrated up to frequencies of 110 GHz. The photonic LO employed is the abovementioned photonic sub- THz synthesizer developed in this thesis, while the EO mixer is an np-i-pn quasi ballistic THz detector. The first fabricated sample of this novel device is used, which is optimized for homodyne/heterodyne detection. The resulting sub-THz EO heterodyne receiver has conversion ratios around -75 dB. It works under zero-bias conditions, which together with the photonic distribution of the LO offers a high potential for remote detection of sub-THz and THz waves. In summary, new photonic architectures and devices are able to provide with state-of-the-art performance for generation of sub-THz and THz waves. In the case of EO heterodyne detection at sub-THz and THz frequency regions, photonic techniques are improving their performance and are closer to offer an alternative to all-electronic detectors. ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------El desarrollo de dispositivos fiables y de alta calidad en el rango frecuencial de Terahercios (THz) con el fin de cubrir el actual vacío tecnológico se ha convertido en una importante inquietud científica. Esto está principalmente motivado por la necesidad de explotar el gran número de aplicaciones identificadas en esta región frecuencial por un gran número de usuarios, incluyendo a usuarios no científicos. El enfoque fotónico empleado para estos propósitos ofrece importantes y exclusivas ventajas sobre otras alternativas existentes, que tienen como principal representante a la tecnología electrónica, especialmente en términos de rango de frecuencia de funcionamiento, posibilidad de distribución fotónica con fibras ópticas, peso, e inmunidad electromagnética. No obstante, las técnicas fotónicas tradicionalmente han ofrecido peores prestaciones en términos de ruido de fase, sintonía y rango dinámico (en generación) y ratio de conversión (en detección) con respecto a la tecnología electrónica de THz en el estado del arte. El trabajo realizado en esta tesis se centra en el diseño, desarrollo y validación de nuevas arquitecturas y componentes fotónicos tanto para generación como detección de ondas de sub-THz y THz que permitan solucionar las desventajas de las técnicas ópticas manteniendo todas sus ventajas. En esta tesis, varios sistemas de generación de sub-THz y THz han sido desarrollados utilizando arquitecturas Difference Frequency Generation (DFG) en las que la fuente DFG es proveída por un Optical Frequency Comb Generator (OFCG) y selección de modos ópticos. Diferentes dispositivos y técnicas son investigados para cada parte del sistema hasta conseguir un sintetizador de altas prestaciones. Passively Mode-Locked Laser Diodes (PMMLDs) son inicialmente evaluados como OFCG integrados. Un diseño mejorado del OFCG es conseguido mediante el uso de un esquema basado en un láser Discrete Mode (DM) bajo régimen Gain Switching (GS) y expansión del ancho de banda óptico mediante el uso de un modulador de fase Electro-Óptico (EO). Como estrategia de selección de modos ópticos, tanto filtrado óptico altamente selectivo como Optical Injection Locking (OIL) son usados y evaluados. Un fotodiodo comercial de ancho de banda 50 GHz y un fotomezclador de THz de superred n-i-pn-i-p son empleados. El sistema de generación final que se presenta en esta tesis consiste en un OFCG basado en GS, OIL como técnica de selección de modos ópticos y un fotomezclador de THz de superred n-i-pn-i-p. Este sintetizador ofrece un rango de funcionamiento de 60 a 140 GHz, directamente escalable a un rango entre 10 GHz y valores más allá de un THz. Sintonía cuasi-continua es ofrecida en todo el rango de frecuencia de operación, con una resolución en frecuencia de 0.1 Hz a 100 GHz que puede ser directamente escalable a 0.01 Hz a 100 GHz y 0.1 Hz a 1 THz. El ancho de línea a 3-dB de la señal a 120 GHz es menor de 10 Hz, solo limitada por la instrumentación de medida. El sistema ofrece una excelente estabilidad en potencia y frecuencia, con desviaciones sobre una hora de operación de 1.5 dB y 5 Hz, respectivamente. Estos valores también están limitados por la precisión e incertidumbre de la instrumentación de medida. Las prestaciones conseguidas por este sintetizador fotónico de sub-THz y THz para la mayoría de figuras de mérito, igualan o superan aquellas de las mejores soluciones comerciales electrónicas en el estado del arte, y supera algunas de estas características en más de un millón de veces en el caso de soluciones fotónicas comerciales en el estado del arte. La parte de detección de esta tesis explora el uso de arquitecturas fotónicas basadas en receptores EO heterodinos y los componentes clave que forman estas arquitecturas: Oscilador Local (OL) fotónico y mezcladores EO. Los primeros resultados son desarrollados en el entorno de microondas (<15 GHz) usando un amplificador de semiconductor óptico ultra no lineal (XN-SOA) como mezclador EO y un OL fotónico basado en GS. Se demuestra como este OL basado en GS ofrece una mejora significativa de las prestaciones del receptor con respecto al uso de OL fotónicos tradicionales basados en modulación lineal. Además, esta arquitectura de detección es validada en una aplicación real (imaging array fotónico), ofreciendo escalabilidad, flexibilidad y ratios de conversión razonables. Tras esto, un receptor EO heterodino es demostrado hasta frecuencias de 110 GHz. El OL fotónico empleado es el sintetizador de altas prestaciones presentado en esta tesis, mientras que el mezclador EO es un nuevo detector de THz: el np-i-pn cuasi-balístico. La primera muestra fabricada de estos nuevos dispositivos, especialmente diseñados y optimizados para detección homodina y heterodina, es empleada. El receptor EO heterodino resultante ofrece ratios de conversión de -75 dB. Este dispositivo es capaz de trabajar sin alimentación, lo que unido a la distribución fotónica del OL, ofrece un gran potencial para detección remota de ondas de sub-THz y THz. En resumen, las nuevas arquitecturas y dispositivos fotónicos presentados en esta tesis son capaces de ofrecer prestaciones en el estado del arte para generación de ondas de sub-THz y THz. En el caso de detectores EO heterodinos en frecuencias de sub-THz y THz, las técnicas fotónicas están mejorando sus prestaciones significativamente y están cada vez más cerca de ofrecer una alternativa a detectores electrónicos en el estado del arte

Topical Workshop on Electronics for Particle Physics

The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities