33 research outputs found

    A New Design for Compact Size Wireless Power Transfer Applications Using Spiral Defected Ground Structures

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    In this article, a new wireless power transfer (WPT) design is proposed for improving the efficient of system. The suggested system contains two spiral defected ground structure (DGS) resonators coupled back-to-back. The spiral DGS alone acts as band stop filter (BSF), and when the two resonators are coupled back-to-back, a BSF is emerged leading to WPT system. The DGS resonators are loaded through chip capacitors for miniaturization. The proposed structures are fabricated and tested. The proposed system has a highest efficiency of 97.7% at a transmission distance of 10 mm which is suitable for biomedical applications. Both simulated and experimental results are in good concurrence

    Compressive Imaging Using RIP-Compliant CMOS Imager Architecture and Landweber Reconstruction

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    In this paper, we present a new image sensor architecture for fast and accurate compressive sensing (CS) of natural images. Measurement matrices usually employed in CS CMOS image sensors are recursive pseudo-random binary matrices. We have proved that the restricted isometry property of these matrices is limited by a low sparsity constant. The quality of these matrices is also affected by the non-idealities of pseudo-random number generators (PRNG). To overcome these limitations, we propose a hardware-friendly pseudo-random ternary measurement matrix generated on-chip by means of class III elementary cellular automata (ECA). These ECA present a chaotic behavior that emulates random CS measurement matrices better than other PRNG. We have combined this new architecture with a block-based CS smoothed-projected Landweber reconstruction algorithm. By means of single value decomposition, we have adapted this algorithm to perform fast and precise reconstruction while operating with binary and ternary matrices. Simulations are provided to qualify the approach.Ministerio de Economía y Competitividad TEC2015-66878-C3-1-RJunta de Andalucía TIC 2338-2013Office of Naval Research (USA) N000141410355European Union H2020 76586

    Efficient Procedure Improving Precision of High Conditioned Matrices in Electronic Circuits Analysis

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    In this article, we propose several improvements that could be done to SPICE simulator. The first is based on a functional implementation of device models. The advantages of functional implementation are demonstrated on basic Shichman-Hodges model of MOS transistor. It starts with a description of primary algorithms used in SPICE simulator for the solution of circuits with nonlinear devices and identify the problems that can occur during simulations.Main part of the article is devoted to improved factorization procedure for simulation of the nonlinear electronic circuits. The primary intention of the proposed method is to increase final precision of the result in a case of high condition linear systems. The procedure is based on a use of the iterative methods for solution of nonlinear and linear equations. Utilizing those methods for one iterative process helps to reduce memory consumption during simulation computation, and it can significantly improve simulation precision. The procedure allows to use enumeration with definable precision in a very efficient way

    Rapport annuel 2015

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    Hierarchical fault tolerance in wireless networked control systems

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    Wireless Networked Control Systems (WNCS) have recently emerged as a replacement for wired control networks. Wireless networked control systems are more suitable for environments that require higher flexibility and robustness. In previous literature a wireless manufacturing line was proposed. The work-cells communication was through IEEE 802.11 technologies and a switched Ethernet backbone. This thesis is aiming to improve the current solution by adding a supervisor to the existing system. The supervisor could be either in passive or active mode. Passive supervisor would intervene when all controllers in the network fail, while active supervisor would act once any controller on the line fail. The system was simulated using OPNET software with 95% confidence analysis. The ability of the system to withstand external interference was assessed through adding a single band jammer to the OPNET simulation. The system was able to hold up to 8KB interfering file sent from a single band jammer affecting the full Wi-Fi spectrum. All results were subjected to a 95% confidence analysis The performability of passive and active supervisor systems was compared. A Markov model of both systems was built. It was shown that by time, the performability of a passive supervisor system is enhanced while that of an active supervisor system degraded. However, the active supervisor showed a better performability in all cases

    MongoDB Database as Storage for GPON Frames

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    This work is focused on creating an open-source software-based solution for monitoring traffic transmitted through gigabit passive optical network. In this case, the data are captured by the field-programmable gate array (FPGA) card and reassembled using parsing software from a passive optical network built on the International Telecommunication Unit telecommunication section (ITU-T) G.984 gigabit-capable passive optical network GPON recommendation. Then, the captured frames are converted by suitable software into GPON frames, which will be further processed for analysis. Due to the high transfer rate of GPON recommendations, the work describes the issue of writing to the Mongo database system. In order to achieve the best possible results and minimal loss of transmitted frames, a series of tests were performed. The proposed test scenarios are based on different database writing approaches and are implemented in the Python and C# programming languages. Based on our results, it has been shown that the high processing speed is too high for Python processing. Critical operations must be implemented in the C# programming language. Due to rapid application development, Python can only be used for noncritical time-consuming data processing operations

    Modeling and design of memristor-based fuzzy systems

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    The incessant down scaling of CMOS technology has been the main driving force for the semiconductor industry over the past decades. Yet, as process variations and leakage current continue to exhibit more pronounced effect with every technology node, this down scaling paradigm is expected to saturate in the few coming years. This prospect has led the research community to seek new technologies to surpass those challenges. Amongst the promising candidates is the memristor technology recently characterized by HP Labs. The miniaturized features and the peculiar behavior exhibited by the memsitor make it very well suited in some applications. For instance, memrsitors are used as memory cells in state-of-the-art memories known as Resistive RAMs in which the non-volatility of the memristor is exploited. The programmable nature of the memristor has made it a powerful candidate in neuromorphic and fuzzy systems that, in essence, go beyond the classical Von Neumann computing paradigm. In such systems, ideas from Artificial Intelligence, that for so long have been implemented on the software level, are implemented as electronic circuitry which renders benefits such as compact area and reduced power consumption. This work focuses on memrsitor-based Fuzzy applications. First, memristor-based Min-Max circuit used in the Fuzzy Inference engine is analyzed. It is proven that memrsitor-based Min-Max circuits can be extended to an arbitrary number of inputs ‘N’ under the proper design constraints. In addition, the effect of the memristor threshold is analyzed and a closed form expression is derived. It is shown that, for a given memristor with a specific OFF resistance and threshold current, there is a trade-off between the size and the resolution of the circuit. Then, a memrsitor-based Defuzzifier circuit is proposed. A major challenge in Defuzzifiers is their area occupancy due to the use of Multiplier and Divider circuits. In this design, the memrsitor analog programmability is leveraged to reduce the multiplication operation into simple Ohm’s Law which alleviates the need for dedicated hardware for multiplier circuit and, accordingly, reduces the area occupancy

    Empathy, education and awareness: A VR hackathon’s approach to tackling climate change

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    Climate change education is crucial for fostering informed and engaged future generations. However, traditional pedagogies often fail to engage learners fully and provide real-world, experiential learning. This paper presents a novel approach to climate change education through a three-day virtual reality (VR) hackathon. The hackathon focused on four United Nations (UN) Sustainable Development Goals (SDGs)—Quality Education, Affordable and Clean Energy, Sustainable Cities and Communities, and Climate Action. Using VR technology and game design software, engineering students worked in teams. They competed against each other in designing immersive environments that demonstrated their understanding of these SDGs and climate change. Our goal was to encourage the development of empathy, education, and awareness around these critical global issues. The hackathon also integrated authentic assessments, mirroring real-world engineering tasks and providing a more practical and relevant learning experience. Our findings suggest that this VR hackathon has significantly enhanced students’ understanding of the SDGs and climate change issues, their competency with VR technologies, as well as their teamwork and problem-solving skills. This paper discusses the hackathon’s design, implementation, and outcomes, highlighting the potential of such innovative approaches in tackling climate change education and awareness

    New methods of partial transmit sequence for reducing the high peak-to-average-power ratio with low complexity in the ofdm and f-ofdm systems

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    The orthogonal frequency division multiplexing system (OFDM) is one of the most important components for the multicarrier waveform design in the wireless communication standards. Consequently, the OFDM system has been adopted by many high-speed wireless standards. However, the high peak-to-average- power ratio (PAPR) is the main obstacle of the OFDM system in the real applications because of the non-linearity nature in the transmitter. Partial transmit sequence (PTS) is one of the effective PAPR reduction techniques that has been employed for reducing the PAPR value 3 dB; however, the high computational complexity is the main drawback of this technique. This thesis proposes novel methods and algorithms for reducing the high PAPR value with low computational complexity depending on the PTS technique. First, three novel subblocks partitioning schemes, Sine Shape partitioning scheme (SS-PTS), Subsets partitioning scheme (Sb-PTS), and Hybrid partitioning scheme (H-PTS) have been introduced for improving the PAPR reduction performance with low computational complexity in the frequency-domain of the PTS structure. Secondly, two novel algorithms, Grouping Complex iterations algorithm (G-C-PTS), and Gray Code Phase Factor algorithm (Gray-PF-PTS) have been developed to reduce the computational complexity for finding the optimum phase rotation factors in the time domain part of the PTS structure. Third, a new hybrid method that combines the Selective mapping and Cyclically Shifts Sequences (SLM-CSS-PTS) techniques in parallel has been proposed for improving the PAPR reduction performance and the computational complexity level. Based on the proposed methods, an improved PTS method that merges the best subblock partitioning scheme in the frequency domain and the best low-complexity algorithm in the time domain has been introduced to enhance the PAPR reduction performance better than the conventional PTS method with extremely low computational complexity level. The efficiency of the proposed methods is verified by comparing the predicted results with the existing modified PTS methods in the literature using Matlab software simulation and numerical calculation. The results that obtained using the proposed methods achieve a superior gain in the PAPR reduction performance compared with the conventional PTS technique. In addition, the number of complex addition and multiplication operations has been reduced compared with the conventional PTS method by about 54%, and 32% for the frequency domain schemes, 51% and 65% for the time domain algorithms, 18% and 42% for the combining method. Moreover, the improved PTS method which combines the best scheme in the frequency domain and the best algorithm in the time domain outperforms the conventional PTS method in terms of the PAPR reduction performance and the computational complexity level, where the number of complex addition and multiplication operation has been reduced by about 51% and 63%, respectively. Finally, the proposed methods and algorithms have been applied to the OFDM and Filtered-OFDM (F-OFDM) systems through Matlab software simulation, where F-OFDM refers to the waveform design candidate in the next generation technology (5G)
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