133 research outputs found

    Parameterized partial element equivalent circuit method for sensitivity analysis of multiport systems

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    This paper presents a new technique to perform parameterized sensitivity analyses of systems that depend on multiple design parameters, such as layout and substrate features. It uses the electromagnetic (EM) method called partial element equivalent circuit to compute state space matrices at a set of design space points. These EM matrices are interpolated as functions of the design parameters. The proposed interpolation scheme allows the computation of the derivatives of the matrices, which are needed to perform the sensitivity analysis. An extensive study of the required stability and passivity properties of the system involved in the parameterized sensitivity analysis is presented. Pertinent numerical results demonstrate the robustness, accuracy, and efficiency of the proposed methodology

    A Spline-Based Partial Element Equivalent Circuit Method for Electrostatics

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    This contribution investigates the connection between Isogeometric Analysis (IgA) and the Partial Element Equivalent Circuit (PEEC) method for electrostatic problems. We demonstrate that using the spline-based geometry concepts from IgA allows for extracting circuit elements without an explicit meshing step. Moreover, the proposed IgA-PEEC method converges for complex geometries up to three times faster than the conventional PEEC approach and, in turn, it requires a significantly lower number of degrees of freedom to solve a problem with comparable accuracy. The resulting method is closely related to the isogeometric boundary element method. However, it uses lowest-order basis functions to allow for straightforward physical and circuit interpretations. The findings are validated by an analytical example with complex geometry, i.e., significant curvature, and by a realistic model of a surge arrester

    Passivity-preserving parameterized model order reduction for PEEC based full wave analysis

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    We present a novel parameterized model order reduction technique applicable to the Partial Element Equivalent Circuit method that is able to generate parametric reduced order models, stable and passive by construction, over a user defined design space. Overall stability and passivity of the parametric reduced order model are guaranteed by an efficient and reliable combination of traditional passivity-preserving model order reduction methods and interpolation schemes based on a class of positive interpolation operators. A pertinent numerical example validates the proposed parameterized model order reduction approach

    Extraction of SPICE-Type Equivalent Circuits of Signal Via Transitions using the PEEC Method

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    Digital devices and discontinuities are typically analyzed by inserting their equivalent circuits into SPICE-type simulators. The partial element equivalent circuit method has been proven to be very useful for electromagnetic modeling. It can be used in both the time and the frequency domain. In this paper, the PEEC technique is employed as an efficient full-wave modeling tool to derive SPICE-type equivalent circuits of signal via transition structures. A nodal analysis technique is utilized in conjunction with the optimization algorithm to extract the equivalent circuits, whose component values are the parameters optimized. The good agreement between different approaches demonstrates that the proposed approach can be a powerful tool for deriving the equivalent circuits of signal via transitions

    A Bayesian approach to adaptive frequency sampling

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    This paper introduces an adaptive frequency sampling scheme, based on a Bayesian approach to the well-known vector fitting algorithm. This Bayesian treatment results in a data-driven measure of intrinsic model uncertainty. This uncertainty measure can in turn be leveraged to sample sequentially in an efficient and robust way. A realistic example is used to visualize the proposed scheme, and to confirm its proficiency

    Reduced order modeling of delayed PEEC circuits

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    We propose a novel model order reduction technique that is able to accurately reduce electrically large systems with delay elements, which can be described by means of neutral delayed differential equations. It is based on an adaptive multipoint expansion and model order reduction of equivalent first order systems. The neutral delayed differential formulation is preserved in the reduced model. Pertinent numerical results validate the proposed model order reduction approach
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