Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process

State-of-the-art power converter topologies such as resonant converters are either designed with or affected by the parasitic capacitances of the power switches. However, the power switches are conventionally characterized in terms of switching time and/or gate charge with little insight into the nonlinearities of the parasitic capacitances. This paper proposes a modelling method that can be utilized to systematically analyse the nonlinear parasitic capacitances. The existing ways of characterizing the off-state capacitance can be extended by the proposed circuit model that covers all the related states: off-state, sub-threshold region, and on-state in the linear region. A high voltage power MOSFET is designed in a partial Silicon on Insulator (SOI) process, with the bulk as a separate terminal. 3D plots and contour plots of the capacitances versus bias voltages for the transistor summarize the nonlinearities of the parasitic capacitances. The equivalent circuits in different states and the evaluation equations are provided

Destructive Single-Event Failures in Diodes

In this summary, we have shown that diodes are susceptible to destructive single-event effects, and that these failures occur along the guard ring. By determining the last passing voltages, a safe operating area can be derived. By derating off of those values, rather than by the rated voltage, like what is currently done with power MOSFETs, we can work to ensure the safety of future missions. However, there are still open questions about these failures. Are they limited to a single manufacturer, a small number, or all of them? Is there a threshold rated voltage that must be exceeded to see these failures? With future work, we hope to answer these questions. In the full paper, laser results will also be presented to verify that failures only occur along the guard ring

Design and analysis on reduced switching frequency current mode control isolated power converters for light load efficiency

This paper focus on improving light load efficiency of isolated DC/DC converters. A mixed signal control platform is proposed to implement multiple-mode variable frequency control. An 8-bit Micro Controller Unit MCU is used in the platform to provide adaptive control schemes and cost effectiveness digital solutions. Small signal analysis is covered to explain frequency modulation effects. Control of isolation transformer flux swing to avoid saturation is also implemented, to provide safe operation both in steady and transient states. A 300 Watt prototype Two-FET forward converter is built up to verify the proposed mixed signal control platform. © 2009 IEEE.published_or_final_versionThe Inaugural IEEE Energy Conversion Congress and Exposition (ECCE 2009), San Jose, CA., 20-24 September 2009. In Proceedings of the IEEE Energy Conversion Congress and Exposition, 2009, p. 3268-327

高压功率MOSFET结终端保护技术及其组合优化设计

场板与场限环是用来提高功率MOSFET抗电压击穿能力的常用结终端保护技术,文章将分别介绍场板与场限环结终端保护技术各自的特点和耐压敏感参数,通过场板和场限环的互补组合来优化设计一款高耐压的VDMOS器件结构,最后采用ATHENA(工艺模拟)和ATLAS(器件模拟)工具来仿真验证优化设计的结果

Impact of Temperature and Switching Rate on Properties of Crosstalk on Symmetrical & Asymmetrical Double-trench SiC Power MOSFET

In this paper, the properties of crosstalk on SiC planar MOSFET, SiC symmetrical double-trench MOSFET and SiC asymmetrical double-trench MOSFET is investigated on a half-bridge topology, to enable analysis of the impact of temperature, drain-source transition speed and gate resistance on the severity of the shoot-through current and induced gate voltage. The experimental measurements, performed on a wide range of temperatures and switching rates, show that the two selected symmetrical and asymmetrical double-trench MOSFETs exhibit higher induced gate voltage during crosstalk with the same external gate resistance compared with the planar SiC MOSFET, yielding a higher shoot-through current. Therefore, in continuous initiation of intentional crosstalk, the two double-trench MOSFETs experience more temperature rise, especially for symmetrical one which leads the device to verge of failure within minutes while the temperature rise in other two devices is significantly lower. The different trends of shoot-through current with temperature on DUTs reveals that they are dominated by different mechanisms, i.e., influenced by threshold voltage and inversion layer carriers’ mobility. A model is developed for prediction of shoot-through current during crosstalk which is validated for the 3 device structures. The comparison of the modelled results with the measurement proves its capability to predict the crosstalk behaviour

The Investigation of Switching Losses in a High Power Factor Buck Converter Using The State of The-Art CooiMos Device

Switching losses is one of the phenomena that occur in power electronic fields, which cause the imperfection of the output waveform. There are lots of ways defined it encounter this problem such as snubber usage, tapped-inductor, MOSFETS and etc. In this century, semiconductor field came out with the revolution of the MOSFET, which is called Coo!MOS in order to reduce the switching losses and give high efficiency. The CoolMOS become famous as it can reduce 80% reduction of switching losses and low cost. Coo!MOS technology - developed for the production of charge-compensated devices - is presented. Due to its novel internal structure, the device offers a dramatic reduction in on-state resistance with a completely altered voltage dependence of the device capacitance. If the power factor is small which is below than 0.85, it causes large amount of power loss (Losses = I2R) and power that should apply not achieved as target. In worst cases it causes equipment damaged and power supply trip. This will affect whole process especially for manufacturing company. Basically, this project needs to evaluate the performance of CoolMOS in improving the switching losses especially in Buck Converter. The main focus is on the parameters that contributing in developing high power factor. Its mean that selection of components used is very important such as inductor value. As conclusion, Buck converter is one of the best methods to investigate power factor correction. Moreover, Coo!MOS device is a good device which should be varies its application in the future

Impact of gamma-ray irradiation on dynamic characteristics of Si and SiC power MOSFETs

Power electronic devices in spacecraft and military applications requires high radiation tolerant. The semiconductor devices face the issue of device degradation due to their sensitivity to radiation. Power MOSFET is one of the primary components of these power electronic devices because of its capabilities of fast switching speed and low power consumption. These abilities are challenged by ionizing radiation which damages the devices by inducing charge built-up in the sensitive oxide layer of power MOSFET. Radiations degrade the oxides in a power MOSFET through Total Ionization Dose effect mechanism that creates defects by generation of excessive electron–hole pairs causing electrical characteristics shifts. This study investigates the impact of gamma ray irradiation on dynamic characteristics of silicon and silicon carbide power MOSFET. The switching speed is limit at the higher doses due to the increase capacitance in power MOSFETs. Thus, the power circuit may operate improper due to the switching speed has changed by increasing or decreasing capacitances in power MOSFETs. These defects are obtained due to the penetration of Cobalt60 gamma ray dose level from 50krad to 600krad. The irradiated devices were evaluated through its shifts in the capacitance-voltage characteristics, results were analyzed and plotted for the both silicon and silicon carbide power MOSFET