Etude des phénomènes de transport de porteurs et du bruit basse fréquence en fonction de la température dans les transistors MOSFETs nanométriques (FinFETs)

In this thesis, DC measurement and noise were performed on FinFETs on silicon on insulator substrate (SOI)processed in 32 nm technologies, with two different gate dielectrics; hafnium oxide (HfO2) and nitrided hafnium silicate(HfSiON). Most of these devices have undergone local and global mechanical strain. The results of static measurementshave shown an improvement of the performances. Temperature measurements (300 K – 475 K) showed that straineddevices seem to be less sensitive to the temperature variation than standard ones, indicating an additional benefit ofstrain engineering. The noise measurements were used to evaluate the quality of the gate oxide of these devices, thenitrided hafnium silicate seems to have a better quality. The study of noise has also provided information about thetransport and physical mechanisms that generate the 1/f noise in these devices. One can notice that there is nosignificant impact of strain on the 1/f noise level. The carrier number fluctuations dominate the 1/f noise for all studieddevices. Noise measurements as a function of temperature (100 K – 300 K) allowed to identify defects in the siliconfilm, often associated to the technological process, by noise spectroscopy method.Au cours de cette thèse, des mesures en régime statique et en bruit ont été effectuées sur des transistors FinFETs réalisés sur substrat SOI, issus de la technologie 32nm, ayant deux différents isolants de grille. L’un est l’oxyde d’hafnium (HfO2) et le second est le silicate d’hafnium nitruré (HfSiON). La plupart de ces dispositifs ont subi des techniques de contrainte mécanique locales et globales. Les résultats de mesures en statique ont montré l’amélioration considérable des performances dans les transistors contraints par rapport aux transistors standards. Il a été montré que ces transistors contraints semblent être moins sensibles à la variation de la température (300K-475K) indiquant un autre atout de l’ingénierie des contraintes. Les résultats de mesures de bruit ont permis d’évaluer la qualité de l’isolant de ces dispositifs, le silicate d’hafnium nitruré semble avoir une meilleure qualité.L’étude du bruit a permis aussi d’apporter des informations sur le transport ainsi que sur les mécanismes physiques qui génèrent le bruit en 1/f dans ces dispositifs. On n’a remarqué aucun impact significatif des contraintes mécaniques sur le niveau du bruit. Le mécanisme qui prédomine dans ces dispositifs est le mécanisme des fluctuations de nombre de porteurs dans les type n et type p. Les mesures de bruit en fonction de la température (100K-300K) ont permis d’identifier des défauts, souvent liés à la technologie de fabrication, dans le film de silicium par la méthode de spectroscopie de bruit

Etude des phénomènes de transport de porteurs et du bruit basse fréquence en fonction de la température dans les transistors MOSFETs nanométriques (FinFETs)

Au cours de cette thèse, des mesures en régime statique et en bruit ont été effectuées sur des transistors FinFETs réalisés sur substrat SOI, issus de la technologie 32 nm, ayant deux différents isolants de grille. L un est l oxyde d hafnium (HfO2) et le second est le silicate d hafnium nitruré (HfSiON). La plupart de ces dispositifs ont subi des techniques de contrainte mécanique locales et globales. Les résultats de mesures en statique ont montré l amélioration considérable des performances dans les transistors contraints par rapport aux transistors standards. Il a été montré que ces transistors contraints semblent être moins sensibles à la variation de la température (300 K - 475 K) indiquant un autre atout de l ingénierie des contraintes. Les résultats de mesures de bruit ont permis d évaluer la qualité de l isolant de ces dispositifs, le silicate d hafnium nitruré semble avoir une meilleure qualité. L étude du bruit a permis aussi d apporter des informations sur le transport ainsi que sur les mécanismes physiques qui génèrent le bruit en 1/f dans ces dispositifs. On n a remarqué aucun impact significatif des contraintes mécaniques sur le niveau du bruit. Le mécanisme qui prédomine dans ces dispositifs est le mécanisme des fluctuations de nombre de porteurs dans les type n et type p. Les mesures de bruit en fonction de la température (100 K 300 K) ont permis d identifier des défauts, souvent liés à la technologie de fabrication, dans le film de silicium par la méthode de spectroscopie de bruit.In this thesis, DC measurement and noise were performed on FinFETs on silicon on insulator substrate (SOI) processed in 32 nm technologies, with two different gate dielectrics; hafnium oxide (HfO2) and nitrided hafnium silicate (HfSiON). Most of these devices have undergone local and global mechanical strain. The results of static measurements have shown an improvement of the performances. Temperature measurements (300 K 475 K) showed that strained devices seem to be less sensitive to the temperature variation than standard ones, indicating an additional benefit of strain engineering. The noise measurements were used to evaluate the quality of the gate oxide of these devices, the nitrided hafnium silicate seems to have a better quality. The study of noise has also provided information about the transport and physical mechanisms that generate the 1/f noise in these devices. One can notice that there is no significant impact of strain on the 1/f noise level. The carrier number fluctuations dominate the 1/f noise for all studied devices. Noise measurements as a function of temperature (100 K 300 K) allowed to identify defects in the silicon film, often associated to the technological process, by noise spectroscopy method.CAEN-BU Sciences et STAPS (141182103) / SudocSudocFranceF

High-temperature characterization of advanced strained nMuGFETs

International audienceDC measurements at high temperature of n-channel triple-gate transistors with 25 nm fin-width and 65 nm fin-height, high-k dielectric and metal gate for strained and unstrained substrates are investigated. The variations of the main transistor parameters with temperature are analyzed from room temperature up to 200°C

Detailled characterisation of SOI n-FinFETs at very low temperature

International audienceDC and low frequency noise measurements on strained and unstrained n-channel FinFET transistors processed on silicon on insulator (SOI) substrates were performed at 10 K in order to evaluate the device performances and study the low frequency noise mechanisms. The main electrical parameters are investigated and compared to those found at room temperature. The low frequency noise analysis shows that at 10 K, the carrier number fluctuations dominate the flicker noise in weak inversion, while the access resistance noise contributions prevails in strong inversion

In depth static and low-frequency noise characterization of n-channel FinFETs on SOI substrates at cryogenic temperature

International audienceThe impact of cryogenic temperature operation (10 K) on the short channel effects and low frequency noise was analysed on strained and unstrained n-channel FinFET transistors fabricated on silicon on insulator (SOI) substrates in order to evaluate the devices static performances and to study the low frequency noise mechanisms. The main electrical parameters are investigated and it is evidenced that even at very low temperatures, the strain-engineering techniques boost the devices performances in terms of mobility, threshold voltage, access resistances and drain saturation currents. The DIBL effect, Early voltage and the intrinsic gain are ameliorated only for the short channel devices. A drawback, however, is that slightly improved turn-on capabilities may be noted for standard channel devices compared to strained ones. Low frequency noise measurements show that the carrier number fluctuations dominate the flicker noise in weak inversion even at 10 K operation. Access resistance noise contributions were evidenced in strong inversion

Bruit basse fréquence dans les transistors ultrafins totalement déplétés sur substrat SOI

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Uncertainties in the estimation of low frequency noise level extracted from noise spectral density measurements

International audienceIt is well known that measurement uncertainty of noise spectral density is related to the time length of observation. With FFT spectrum analyzers, the measurement error can be reduced by averaging Navg measurements. Standard error is then reduced by the square root of Navg. This paper deals with the error introduced when one wants to extract from the noise spectral density measurement the 1/f level, white noise level and lorentzian parameters. In that purpose, different estimation techniques from different groups are compared and discussed

Low-frequency noise behavior in P-channel SOI FinFETs processed with different strain techniques

International audienceThe aim of this paper is to investigate the low-frequency noise behavior in p-channel SOI FinFETs processed with different strain techniques. An unusual noise behavior was observed for all devices studied. This unusual noise was investigated for different applied gate voltages and different channel lengths at room temperature. The carrier number fluctuations explain the flicker noise for all devices. The different strain techniques employed have no significant impact in the noise level

Uncertainties in the estimation of low frequency noise level extracted from noise spectral density measurements

International audienceIt is well known that measurement uncertainty of noise spectral density is related to the time length of observation. With FFT spectrum analyzers, the measurement error can be reduced by averaging Navg measurements. Standard error is then reduced by the square root of Navg. This paper deals with the error introduced when one wants to extract from the noise spectral density measurement the 1/f level, white noise level and lorentzian parameters. In that purpose, different estimation techniques from different groups are compared and discussed

Low temperature noise spectroscopy of p-channel SOI FinFETs

International audienceThe aim of this study is to use the excess low frequency noise versus the temperature in order to characterize the traps in the depleted silicon film of p-channel FinFETs on standard and strained substrates. An important number of identified traps related to boron and carbon can be observed, in particular for the strained substrate devices