Inference procedures based on the polar coordinates of the empirical characteristic function

A general procedure of parametric estimation is proposed for distributions having characteristic function with polar coordinates in closed form. The procedure generalizes the method of Koutrouvelis (1982a) for estimating the parameters in the special case of Cauchy distributions. The resulting estimators are asymptotically equivalent to the estimators proposed by Feuerverger and McDunnough (1981b) and serve as a basis for chi-squared goodness-of-fit tests. For symmetric families the employment of polar coordinates of the empirical characteristic function is shown to have definite advantages in both estimation and testing

On the Power Consumption of security algorithms employed in wireless networks

Summarization: Supporting high levels of security in wireless networks is a challenging issue because of the specific problems this environment poses; the provided security by small mobile systems, such as PDAs and mobile phones, is often restricted by their limited battery power and their limited processing power. Driven by these restrictions, the designer will have to decide whether to implement the wireless network security schemes in software or to add special purpose hardware units to the system, executing those CPU intensive tasks. This paper demonstrates and compares the Hardware and Software implementations of a number of widely used security applications employed in wireless networks. We measured the total energy consumption for each security algorithm when implemented in reconfigurable hardware devices and we compared it with the total energy consumption of the equivalent software applications. We demonstrate, that the hardware implementations on a state-of-the-art FPGA are significantly faster while they consume three orders of magnitude less power when compared with the software implementations executed on a state-of-the-art hard-core CPU which is embedded in the same FPGA device.Παρουσιάστηκε στο: 6th IEEE Consumer Communications and Networking Conferenc

An efficient FPGA-based implementation of Pollard's (rho-1) factorization algorithm

Summarization: Due to the widespread use of public key cryptosystems whose security depends on the presumed difficulty of the factorization problem, the algorithms for finding the prime factors of large composite numbers are becoming extremely important. In recent years the limits of the best integer factorization algorithms have been extended greatly, due in part to Moore's law and in part to algorithmic improvements. Furthermore, new silicon devices, such as FPGAs, give us the advantage of custom hardware architectures for minimizing execution time for such difficult computations. This paper demonstrates a very efficient FPGA-based design executing Pollard's (rho - 1) factorization algorithm. The proposed device offers a speedup from 20 to 231 when compared to the software implementation of the same algorithm in a state-of-the-art CPU.Παρουσιάστηκε στο: International Conference on Field-Programmable Technolog

District Energy Systems : A Collaborative Exchange of Results on Planning, Operation and Modelling for Energy Efficiency

Workshop organized by INDIGO project as a collaborative activity among EU funded projects in the area of District Heating and Cooling. The objective of the workshop was twofold: (1) to create a cluster of European funded projects working in the area of District Energy Systems; and (2) to create a networking opportunity in which to share experiences on the results and difficulties of the researches, and to identify synergies.OPT