108 research outputs found

    Spacecraft optical disk recorder memory buffer control

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    The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University)

    Reuse and Interoperability of Avionics for Space Systems

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    The space environment presents unique challenges for avionics. Launch survivability, thermal management, radiation protection, and other factors are important for successful space designs. Many existing avionics designs use custom hardware and software to meet the requirements of space systems. Although some space vendors have moved more towards a standard product line approach to avionics, the space industry still lacks similar standards and common practices for avionics development. This lack of commonality manifests itself in limited reuse and a lack of interoperability. To address NASA s need for interoperable avionics that facilitate reuse, several hardware and software approaches are discussed. Experiences with existing space boards and the application of terrestrial standards is outlined. Enhancements and extensions to these standards are considered. A modular stack-based approach to space avionics is presented. Software and reconfigurable logic cores are considered for extending interoperability and reuse. Finally, some of the issues associated with the design of reusable interoperable avionics are discussed

    SODR Memory Control Buffer Control ASIC

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    The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function

    Error Mitigation of Point-to-Point Communication for Fault-Tolerant Computing

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    Fault tolerant systems require the ability to detect and recover from physical damage caused by the hardware s environment, faulty connectors, and system degradation over time. This ability applies to military, space, and industrial computing applications. The integrity of Point-to-Point (P2P) communication, between two microcontrollers for example, is an essential part of fault tolerant computing systems. In this paper, different methods of fault detection and recovery are presented and analyzed

    Traffic Collision Avoidance System: False Injection Viability

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    Safety is a simple concept but an abstract task, specifically with aircraft. One critical safety system, the Traffic Collision Avoidance System II (TCAS), protects against mid-air collisions by predicting the course of other aircraft, determining the possibility of collision, and issuing a resolution advisory for avoidance. Previous research to identify vulnerabilities associated with TCAS’s communication processes discovered that a false injection attack presents the most comprehensive risk to veritable trust in TCAS, allowing for a mid-air collision. This research explores the viability of successfully executing a false injection attack against a target aircraft, triggering a resolution advisory. Monetary constraints precluded access to a physical TCAS unit; instead, this research creates a novel program, TCAS-False Injection Environment (TCAS-FIE), that incorporates real-world distributed computing systems to simulate a ground-based attacker scenario which explores how a false injection attack could target an operational aircraft. TCAS-FIEs’ simulation models are defined by parameters to execute tests that mimic real-world TCAS units during Mode S message processing. TCAS-FIE simulations execute tests over applicable ranges (5–30 miles), altitudes (25–45K ft), and bearings standard for real-world TCAS tracking. The comprehensive tests compare altitude, measure range closure rate, and measure signal strength from another aircraft to determine the delta in bearings over time. In the attack scenario, the ground-based adversary falsely injects a spoofed aircraft with characteristics matching a Boeing 737-800 aircraft, targeting an operational Boeing 737-800 aircraft. TCAS-FIE completes 555,000 simulations using the various ranges, altitudes, and bearings. The simulated success rate to trigger a resolution advisory is 32.63%, representing 181,099 successful resolution advisory triggers out of 555,000 total simulations. The results from additional analysis determine the required ranges, altitudes, and bearing parameters to trigger future resolution advisories, yielding a predictive threat map for aircraft false injection attacks. The resulting map provides situational awareness to pilots in the event of a real-world TCAS anomaly

    On Component Reliability and System Reliability for Space Missions

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    This paper is to address the basics, the limitations and the relationship between component reliability and system reliability through a study of flight computing architectures and related avionics components for NASA future missions. Component reliability analysis and system reliability analysis need to be evaluated at the same time, and the limitations of each analysis and the relationship between the two analyses need to be understood

    Augmenting Space Technology Program Management with Secure Cloud & Mobile Services

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    The National Aeronautics and Space Administration (NASA) Game Changing Development (GCD) program manages technology projects across all NASA centers and reports to NASA headquarters regularly on progress. Program stakeholders expect an up-to-date, accurate status and often have questions about the program's portfolio that requires a timely response. Historically, reporting, data collection, and analysis were done with manual processes that were inefficient and prone to error. To address these issues, GCD set out to develop a new business automation solution. In doing this, the program wanted to leverage the latest information technology platforms and decided to utilize traditional systems along with new cloud-based web services and gaming technology for a novel and interactive user environment. The team also set out to develop a mobile solution for anytime information access. This paper discusses a solution to these challenging goals and how the GCD team succeeded in developing and deploying such a system. The architecture and approach taken has proven to be effective and robust and can serve as a model for others looking to develop secure interactive mobile business solutions for government or enterprise business automation

    Radiation Single Event Effects (SEE) Impact on Complex Avionics Architecture Reliability

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    The NASA Engineering and Safety Center (NESC) has an urgent need to understand how system-level reliability of an avionics architecture is compromised when portions of the architecture are temporarily unavailable due to single event effects (SEE). The proposed activity parametrically evaluated these SEE impacts on system reliability based on mission duration, upset rate and recovery times for a representative redundant architecture. The key stakeholders for this study are NASA programs and projects that expect to use avionics architectures with electrical, electronic and electromechanical (EEE) parts susceptible to SEE when exposed to the mission expected radiation environment
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