Novel modeling strategy for a BCI set-up applied in an automotive application: an industrial way to use EM simulation tools to help Hardware and ASIC designers to improve their designs for immunity tests

Electronics suppliers of automotive industry use BCI (Bulk Current Injection) measurements to qualify immunity robustness of their equipment whereas electronics components manufacturers use DPI (Direct Power Injection) to qualify immunity of their component. Due to harness resonances, levels obtained during a BCI test exceed standard DPI requirements imposed by automotive suppliers onto components' manufacturers. We propose to use BCI set-up modeling to calculate the equivalent DPI level obtained at the component level during equipment testing and to compare results with DPI measurements realized at IC level

Time domain analysis of a wideband common-mode suppression filter for bent interconnects

A technique to efficiently reduce differential-to-common mode conversion occuring at a bend discontinuity in coupled microstrip lines is investigated. Total signal integrity in the interconnect structure has been improved by minimizing the differential reflection coefficient and insertion loss simultaneously. This is achieved by changing the geometry of the microstrip lines via a tapering section to tightly or very tightly coupled ones in the area of the bend. The new design was manufactured, measured, and validated by means of time-domain analysis, providing very satisfactory results

Efficient optimization of the integrity behavior of analog nonlinear devices using surrogate models

A novel technique to analyze and optimize the integrity behavior of nonlinear analog devices in the presence of noise is proposed. The technique leverages surrogate models, as such reducing the simulation time, avoiding time-consuming and expensive measurements after tape-out and hiding the original netlist of the circuit, while maintaining high accuracy. Easy integration of the surrogates into a circuit simulator together with pertinent subcircuits representing, e. g., board and package, allows mimicking the integrity behavior of a complete setup while still being in the design phase. In this contribution, the method is applied to a case study, being a voltage regulator designed for automotive applications

Constrained multiobjective optimization of a common-mode suppression filter

Designing an optimized common-mode suppression filter for a bend in a differential trace pair on a printed circuit board involves determining the geometrical parameters that simultaneously provide a large reduction of conversion noise, a small differential mode reflection coefficient and low overall loss, given hardware and manufacturing constraints. Therefore, a novel constrained multiobjective optimization technique is proposed that relies on intermediate surrogate models of the different cost functions instead of numerically expensive full-wave simulations, saving CPU time and memory resources. As a result, a 3-D Pareto-front is created and then constrained based on hardware limitations, depicting the tradeoff between the costs and allowing an easy selection of the most optimal layout geometry

Translation of automotive module RF immunity test limits into equivalent IC test limits using S-parameter IC models

A method to translate immunity specifications of automotive modules into equivalent requirements at integrated circuit (IC) level, using linear scattering parameter models of the ICs, is presented. A technique is described to determine S-parameters of ICs by simulations based on back-annotated analog schematics. The simulation results are compared with measurement data obtained using a specially designed test board. As an example, simulation and measurement results are given for the input stage of an automotive sensor interface. A good agreement is obtained from the lowest test frequency up to 1 GHz. Above this value, the measured results seem to be dominated by package effects

A wideband common-mode suppression filter for bend discontinuities in differential signaling using tightly coupled microstrips

A new type of bend is proposed that reduces differential-to-common mode conversion occuring at the bend discontinuity in coupled microstrip lines for high-speed digital circuits. Simultaneously, great care has been taken to minimize the differential reflection coefficient and insertion loss, leading to an overall improved signal integrity. This is achieved by tapering the microstrip lines to tightly or very tightly coupled ones in the area of the bend. Full-wave simulations in the DC to 6 GHz frequency range show that over 9 dB and 14 dB suppression of conversion noise is achieved for tightly coupled and very tightly coupled bends, respectively. Also for these new structures, with a total length of 100 mm, the insertion loss remains below 0.6 dB. Measurements on prototype bends show very good agreement with full-wave simulations. Also time domain measurements demonstrate the significant reduction in conversion noise while keeping return loss low. Moreover, for design purposes, a dedicated circuit model which closely matches the full-wave characteristics of the proposed bends is presented